EPC16UC88 vs EPC16U88 比較
詳細な並列比較: EPC16UC88 メーカー: Altera および EPC16U88 メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EPC16UC88 | EPC16U88 |
|---|---|---|
| ブランド | Altera | Altera |
| カテゴリ | Memory ICs | FPGA & CPLD |
| ライフサイクル状態 | Unknown | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $0.00 | $11.85 |
| Device Type | In-system programmable configuration PROM for FPGAs | — |
| Configuration Memory Capacity | 16 Mb | — |
| 電源電圧 | 3.3 V core and I/O | — |
| パッケージ | 88-UBGA (11x8) | 88-ball UBGA (UltraBGA), 11x8 mm |
| Package Family | UBGA | — |
| In-System Programmability | IEEE Std. 1532 compatible | — |
| Programming Language Support | Jam Standard Test and Programming Language (STAPL) | — |
| JTAG Boundary Scan | Supported | — |
| nINIT_CONF Function | Allows private JTAG instruction to start FPGA configuration | — |
| Configuration Architecture | Configuration controller and flash memory | — |
| FPGA Configuration Use | Automatic configuration after power-up or system initialization | — |
| Data Output | Configuration data output controlled by OE and nCS | — |
| Output Control | OE and nCS control tri-state buffer and address counter | — |
| 実装タイプ | Surface mount | — |
| Package Dimensions | 11 mm x 8 mm | — |
| RoHS ステータス | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS compliance status] |
| REACH Status | [DATA_NEEDED: REACH status] | — |
| 動作温度 | [DATA_NEEDED: operating temperature] | -40C to +85C (industrial) |
| Output Current | [DATA_NEEDED: output current] | — |
| Configuration Frequency | [DATA_NEEDED: configuration frequency] | — |
| AEC-Q100 Qualification | [DATA_NEEDED: AEC-Q100 qualification] | — |
| Memory Density | — | 16 Mb |
| Device Family | — | EPC16 (Enhanced Configuration Device) |
| 機能 | — | Configuration PROM for SRAM-based LUT FPGAs |
| Package Suffix Code | — | U88 (UBGA-88) |
| Supply Voltage (VCC) | — | 3.3 V |
| I/O Voltage Tolerance | — | 5 V tolerant I/O |
| Configuration Modes Supported | — | FPP, PS, AS (with target FPGA) |
| In-System Programming | — | Yes (IEEE 1149.1 JTAG) |
| Multi-Device Cascading | — | Yes (page-mode support) |
| Compatible FPGA Families | — | Altera Stratix, Cyclone, Arria series |
| Configuration Interface Width | — | Up to 8-bit parallel (FPP) |
| MSLレベル | — | [DATA_NEEDED: MSL moisture sensitivity level] |