EPC16UC88NT vs EPC16UC88T 比較
詳細な並列比較: EPC16UC88NT メーカー: Altera および EPC16UC88T メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EPC16UC88NT | EPC16UC88T |
|---|---|---|
| ブランド | Altera | Altera |
| カテゴリ | Memory ICs | EEPROM |
| ライフサイクル状態 | 有効 | ラストバイ |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $0.00 | $9.95 |
| Device Type | Enhanced configuration device | — |
| Memory Capacity | 16 Mbit | — |
| Memory Technology | Flash memory | — |
| Primary Function | Configuration storage for SRAM-based FPGA devices | — |
| Programming Type | In-system programmable configuration PROM | — |
| パッケージ | 88-UBGA | 88-ball UBGA, 11 mm x 8 mm |
| Package Dimensions | 11 mm by 8 mm | — |
| Configuration Device Family | EPC4, EPC8, EPC16 | — |
| Supported FPGA Family | Stratix II | — |
| Configuration Data Reload | Required after power-up, system initialization, or new configuration data request | — |
| Configuration Data Source | Nonvolatile external configuration memory | — |
| Target Device Technology | SRAM-based FPGA | — |
| Datasheet Source Page Count | 36 pages | — |
| 動作温度 | [DATA_NEEDED: operating temperature range] | — |
| 電源電圧 | [DATA_NEEDED: supply voltage range] | — |
| Configuration Interface | [DATA_NEEDED: configuration interface and pin assignments] | Serial (4-wire: nCS, DCLK, DATA, nINIT_CONF_DONE) |
| Programming Voltage | [DATA_NEEDED: programming voltage specification] | — |
| Maximum Configuration Clock | [DATA_NEEDED: maximum configuration clock frequency] | — |
| Junction Temperature | [DATA_NEEDED: junction temperature range] | — |
| Storage Temperature | [DATA_NEEDED: storage temperature range] | — |
| Moisture Sensitivity Level | [DATA_NEEDED: MSL rating] | — |
| RoHS ステータス | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS] |
| REACH Status | [DATA_NEEDED: REACH status] | — |
| Lead-Free Status | [DATA_NEEDED: lead-free status] | — |
| Halogen-Free Status | [DATA_NEEDED: halogen-free status] | — |
| メモリタイプ | — | Non-volatile Flash configuration PROM (in-system programmable) |
| Memory Density | — | 16 Mbit (2,097,152 x 8 bits) |
| Maximum DCLK Frequency | — | 33 MHz |
| Supply Voltage (VCC) | — | 3.0 V to 3.6 V (3.3 V nominal) |
| 動作温度範囲 | — | -40 C to +85 C (industrial) |
| In-System Programming | — | IEEE Std 1149.1 (JTAG) |
| Cascade Support | — | Yes (for higher density multi-PROM chains) |
| MSEL Compatibility | — | FPP / PS configuration modes (3.3 V legacy) |
| Compatible FPGA Families | — | Cyclone, Cyclone II, Stratix, Stratix II, Stratix III, Stratix IV, Arria GX |
| Family Density Step | — | Largest member of EPC4 / EPC8 / EPC16 family |
| MSLレベル | — | [DATA_NEEDED: MSL] |
| Lead-Free / Halogen-Free | — | [DATA_NEEDED: lead-free status] |
| Open-Drain nINIT_CONF_DONE | — | Yes |