EPC2LC2QN vs EPC2LI20N 比較
詳細な並列比較: EPC2LC2QN メーカー: Altera および EPC2LI20N メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EPC2LC2QN | EPC2LI20N |
|---|---|---|
| ブランド | Altera | Altera |
| カテゴリ | Memory ICs | Memory ICs |
| ライフサイクル状態 | Obsolete | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $15.20 | $5.10 |
| Product Type | FPGA Configuration Device | — |
| Configuration Memory Size | 2 Mb | — |
| Target Device Family | SRAM-Based LUT FPGAs (APEX II, Cyclone, Stratix) | — |
| Core Supply Voltage | 3.3 V | — |
| I/O Supply Voltage | 3.3 V | — |
| 動作温度 | 0°C to +70°C (Commercial) | [DATA_NEEDED: operating temperature range] |
| パッケージ | 100-pin PQFP | — |
| 実装タイプ | Surface Mount | Surface Mount |
| Configuration Interface | 4-wire Serial (DATA, DCLK, nCONFIG, nSTATUS) | — |
| Programming Interface | JTAG (IEEE 1149.1) | — |
| Bitstream Compression | Supported (Altera-compressed format) | — |
| Multi-Device Daisy-Chain Support | Yes (up to 8 FPGAs) | — |
| In-System Programmability | Yes | — |
| Bitstream Programming Cycles | [DATA_NEEDED: minimum endurance cycles] | — |
| RoHS ステータス | Compliant | [DATA_NEEDED: RoHS status] |
| Lead-Free | Yes | — |
| MSLレベル | [DATA_NEEDED: MSL rating] | — |
| Country of Origin | [DATA_NEEDED: COO] | — |
| メモリタイプ | — | Non-volatile configuration PROM (Flash) |
| メモリサイズ | — | 1.6 Mbit |
| Programmable Type | — | In System Programmable (ISP via JTAG) |
| Configuration Mode | — | Serial |
| Maximum Configuration Frequency | — | 10 MHz |
| Supply Voltage (VCCINT) | — | 3.0 V to 3.6 V |
| Supply Voltage (VCCIO) | — | 4.5 V to 5.5 V |
| パッケージ / ケース | — | 20-PLCC (J-Lead), 9x9 mm |
| Packaging | — | Tube |
| Supported FPGA Series | — | ACEX 1K, APEX II, Cyclone, Stratix II |
| JTAG Interface | — | IEEE 1149.1 boundary scan (TCK/TDI/TMS/TDO) |
| Configuration Pins | — | nCS, DCLK, DATA, nCONFIG, nSTATUS, CONF_DONE |