EPC8Q1100 vs EPC8QI100 比較
詳細な並列比較: EPC8Q1100 メーカー: Altera および EPC8QI100 メーカー: Intel。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EPC8Q1100 | EPC8QI100 |
|---|---|---|
| ブランド | Altera | Intel |
| カテゴリ | FPGA & CPLD | Memory ICs |
| ライフサイクル状態 | ラストバイ | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $25.90 | $10.85 |
| Product Type | Enhanced Configuration Device (boot PROM) | — |
| Memory Density | 8 Mbit (8,388,608 bits) | — |
| Supported FPGAs | Altera SRAM-based LUT FPGAs (Cyclone, Stratix, APEX, ACEX, Mercury, Excalibur) | — |
| Configuration Interface | Altera Enhanced Config serial interface (DATA, DCLK, nCONFIG, nSTATUS, CONF_DONE) | — |
| Max DCLK Frequency | 33 MHz (Fast-mode) | — |
| Supply Voltage (VCC) | 3.0 V to 3.6 V | — |
| Supply Voltage (VCCIO for FPGA interface) | 1.8 V / 2.5 V / 3.3 V tolerant | — |
| Programming Interface | IEEE Std 1149.1 JTAG (ISP) + serial byte-blaster mode | — |
| In-System Programmable | Yes | — |
| パッケージ | 100-pin PQFP (plastic quad flat pack) | 100-PQFP (20 x 14 mm) |
| 動作温度 | -40 C to +85 C (industrial) | -40C to +85C (industrial) |
| Operating Current (active read) | [DATA_NEEDED: active ICC] | — |
| Standby Current | [DATA_NEEDED: ICC standby] | — |
| Endurance (program/erase cycles) | [DATA_NEEDED: endurance cycles] | — |
| Data Retention | [DATA_NEEDED: data retention years] | — |
| RoHS ステータス | [DATA_NEEDED: RoHS status] | Non-compliant (legacy PQFP, lead-bearing) |
| Lead-Free | [DATA_NEEDED: lead-free] | — |
| メモリタイプ | — | Flash (NOR, Enhanced Configuration PROM) |
| メモリサイズ | — | 8 Mbit |
| Supply Voltage (Core) | — | 3.3 V |
| Supply Voltage (I/O) | — | 3.3 V |
| インターフェース | — | Altera FPGA configuration serial/parallel (FPP) + JTAG (IEEE 1149.1) |
| In-System Programmability | — | IEEE Std. 1532 compliant |
| Programming Language | — | Jam STAPL |
| Boundary Scan | — | JTAG boundary-scan test supported |
| Data Compression | — | Yes (increases effective capacity) |
| Configuration Controller | — | On-chip, dedicated to Altera FPGAs |
| Initiate-Configuration Pin | — | nINIT_CONF (private JTAG instruction) |
| 実装タイプ | — | Surface Mount |
| Compatible FPGAs | — | Stratix, Stratix II, APEX II, APEX 20K, Mercury, ACEX 1K, FLEX 10K, Cyclone, Cyclone II, Arria GX, Stratix GX, Stratix II GX |