EPF10K100ARI240-3 vs EPF10K100BQC240-1 比較
詳細な並列比較: EPF10K100ARI240-3 メーカー: Altera および EPF10K100BQC240-1 メーカー: Intel。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
Altera
EPF10K100ARI240-3 - 100K Gate FLEX 10KA FPGA, 189 I/O, 240-RQFP | Intel / Altera
EPF10K100ARI240-3 NrndIntel
EPF10K100BQC240-1 - 100K FLEX-10K FPGA, 240-PQFP | Intel / Altera
EPF10K100BQC240-1 ⚠ ラストタイムバイ仕様比較
| パラメータ | EPF10K100ARI240-3 | EPF10K100BQC240-1 |
|---|---|---|
| ブランド | Altera | Intel |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | NRND | ラストバイ |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $61.75 | $119.00 |
| Manufacturer | Altera (now Intel) | — |
| Series | FLEX 10KA | FLEX-10K |
| Logic Elements / Cells | 4,992 | — |
| Total Gates | 100,000 | — |
| Embedded RAM Bits | 24,576 | — |
| Logic Array Blocks (LABs) | 624 | — |
| User I/Os | 189 | — |
| Number of I/O Banks | [DATA_NEEDED: number of I/O banks] | — |
| Supply Voltage (Core) | 3.3 V | — |
| Process Technology | 0.30 µm CMOS, SRAM | 0.42 µm SRAM CMOS |
| Maximum Operating Frequency | 125 MHz | — |
| Pin-to-Pin Propagation Delay | 0.6 ns | — |
| Package Type | 240-BFQFP Exposed Pad (240-RQFP) | — |
| 動作温度 | 0 °C to +70 °C (commercial) | 0 °C to +70 °C (commercial) |
| JTAG Support | Yes (IEEE Std 1149.1-1990 BST) | — |
| PCI Compliance | 3.3 V PCI; selected variants support 5.0 V PCI | — |
| Configuration Method | Serial configuration device (EPC1/EPC2/EPC16) or JTAG | ByteBlasterMV / BitBlaster / JTAG |
| RoHS ステータス | unknown | [DATA_NEEDED: RoHS compliance] |
| Family | — | FLEX-10K (EPF10K100B) |
| Logic Elements (LEs) | — | 6,144 |
| Typical Gates | — | 100,000 |
| Embedded Array Blocks (EABs) | — | 12 |
| Total RAM Bits | — | 24,576 (12 × 2,048 bits per EAB) |
| Maximum User I/O | — | 189 |
| Supply Voltage (VCCINT / VCCIO) | — | 4.75 V to 5.25 V |
| Speed Grade | — | -1 |
| Combinatorial tPD (typical) | — | 11 ns |
| パッケージ | — | 240-pin BFQFP / PQFP (BQC suffix) |
| Package Dimensions | — | 32 mm × 32 mm |
| 実装タイプ | — | Surface Mount |
| MSLレベル | — | 3 (per JEDEC J-STD-020) |