EPF10K100EQC208-2X vs EPF10K100EQC208-1N 比較
詳細な並列比較: EPF10K100EQC208-2X メーカー: Altera および EPF10K100EQC208-1N メーカー: Intel。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
Altera
EPF10K100EQC208-2X - FLEX 10KE FPGA, 100K Gates, 208-PQFP | Altera
EPF10K100EQC208-2X ⚠ ラストタイムバイIntel
EPF10K100EQC208-1N - 100K Gate FLEX-10KE FPGA, 147 I/O, 208-PQFP | Intel
EPF10K100EQC208-1N ⚠ ラストタイムバイ仕様比較
| パラメータ | EPF10K100EQC208-2X | EPF10K100EQC208-1N |
|---|---|---|
| ブランド | Altera | Intel |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | ラストバイ | ラストバイ |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $59.50 | $54.90 |
| Series | FLEX-10KE | FLEX-10KE |
| Family | FLEX 10KE | FLEX 10K (SRAM-based FPGA with EAB) |
| Logic Elements / Cells | 4,992 | — |
| System Gates | 100,000 | — |
| Embedded Memory (EAB RAM) | 49,152 bits | — |
| Number of I/O Pins | 147 | — |
| Number of Logic Array Blocks (LABs) | [DATA_NEEDED: LAB count] | 624 |
| Number of Embedded Array Blocks (EABs) | 12 | — |
| Supply Voltage (VCCINT) | 2.375 V to 2.625 V (2.5 V nominal) | — |
| Process Technology | 0.22 µm SRAM | 0.42 um CMOS SRAM |
| Maximum Internal Frequency (-2 grade) | 250 MHz | — |
| パッケージ / ケース | 208-BFQFP (PQFP) | 208-BFQFP / 208-PQFP |
| Supplier Device Package | 208-PQFP (28 × 28 mm, 0.5 mm pitch) | 208-PQFP (28 x 28 mm) |
| Operating Temperature Grade | Commercial | — |
| Configuration Mode | Passive Serial / Passive Parallel Async | — |
| 実装タイプ | Surface Mount | Surface Mount |
| Lead-Free Plating (-X suffix) | Yes (matte-tin, lead-free) | — |
| RoHS ステータス | Compliant (-X suffix) | Compliant (lead-free, 'N' suffix) |
| MSLレベル | [DATA_NEEDED: MSL level] | — |
| Typical Gates | — | 100,000 gates |
| Logic Elements | — | 4,992 |
| Total RAM Bits | — | 49,152 bits |
| User I/Os | — | 147 |
| Supply Voltage - Core (VCCINT) | — | 2.375 V to 2.625 V |
| Propagation Delay (max) | — | 0.6 ns |
| Speed Grade | — | -1 (faster bin) |
| 動作温度 | — | 0 C to +70 C (Commercial) |
| Configuration Method | — | SRAM, serial or parallel |
| JTAG Support | — | Yes (IEEE 1149.1 boundary-scan) |