EPM3064ATI44-10N vs EPM3064ATI44-7N 比較
詳細な並列比較: EPM3064ATI44-10N メーカー: Altera および EPM3064ATI44-7N メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EPM3064ATI44-10N | EPM3064ATI44-7N |
|---|---|---|
| ブランド | Altera | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | NRND |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $3.95 | $5.10 |
| Family | MAX 3000A | MAX 3000A |
| Product Type | CPLD (Complex Programmable Logic Device) | — |
| Macrocells | 64 | — |
| Usable Gates | 1250 | 1,250 gates |
| User I/Os | 34 | — |
| Dedicated Inputs | 4 | — |
| Logic Blocks | 4 | — |
| Pin-to-Pin Delay | 10 ns (-10 speed grade) | — |
| Maximum Frequency (fMAX) | 100 MHz | 135.1 MHz |
| Programmable Type | In-System Programmable (EEPROM) | — |
| ISP Interface | IEEE Std. 1149.1 (JTAG) | — |
| ISP Standard Compliance | IEEE Std. 1532 | — |
| Core Supply Voltage (VCCINT) | 3.3 V | — |
| I/O Supply Voltage (VCCIO) | 3.3 V or 2.5 V (MultiVolt) | — |
| 動作温度 | -40C to +85C (Industrial, "N" suffix) | — |
| パッケージ | 44-pin TQFP | 44-pin TQFP (10x10 mm, 0.8 mm pitch) |
| Process Technology | CMOS EEPROM | 0.30 µm CMOS EEPROM |
| Boundary-Scan Test | Built-in (JTAG) | — |
| 実装タイプ | Surface Mount | — |
| Lead-Free Status | Contains Lead (per digchip datasheet excerpt) | — |
| RoHS ステータス | Non-Compliant (per digchip datasheet excerpt) | Compliant (lead-free, 'N' suffix) |
| Logic Elements / Macrocells | — | 64 macrocells |
| Pin-to-Pin Logic Delay | — | 7 ns (speed grade -7) |
| User I/O Count | — | 34 I/O |
| Dedicated Input Pins | — | 4 |
| Supply Voltage (VCCINT) | — | 3.3 V |
| I/O Bank Voltage (VCCIO) | — | 1.8 V / 2.5 V / 3.3 V / 5 V tolerant (multiVolt) |
| Program Memory Type | — | EEPROM (in-system programmable) |
| Programming Interface | — | IEEE 1149.1 JTAG |
| Operating Temperature Grade | — | Industrial (-40C to +85C) |