EPM3064ATI44-10N vs EPM3064ATI44-7N 对比

详细并排对比 EPM3064ATI44-10N 出自 Altera 和 EPM3064ATI44-7N 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPM3064ATI44-10N EPM3064ATI44-7N
品牌 Altera Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete 不推荐新设计
库存状态 有库存 有库存
单价(USD) $3.95 $5.10
Family MAX 3000A MAX 3000A
Product Type CPLD (Complex Programmable Logic Device) —
Macrocells 64 —
Usable Gates 1250 1,250 gates
User I/Os 34 —
Dedicated Inputs 4 —
Logic Blocks 4 —
Pin-to-Pin Delay 10 ns (-10 speed grade) —
Maximum Frequency (fMAX) 100 MHz 135.1 MHz
Programmable Type In-System Programmable (EEPROM) —
ISP Interface IEEE Std. 1149.1 (JTAG) —
ISP Standard Compliance IEEE Std. 1532 —
Core Supply Voltage (VCCINT) 3.3 V —
I/O Supply Voltage (VCCIO) 3.3 V or 2.5 V (MultiVolt) —
工作温度 -40C to +85C (Industrial, "N" suffix) —
封装 44-pin TQFP 44-pin TQFP (10x10 mm, 0.8 mm pitch)
Process Technology CMOS EEPROM 0.30 µm CMOS EEPROM
Boundary-Scan Test Built-in (JTAG) —
安装类型 Surface Mount —
Lead-Free Status Contains Lead (per digchip datasheet excerpt) —
RoHS 状态 Non-Compliant (per digchip datasheet excerpt) Compliant (lead-free, 'N' suffix)
Logic Elements / Macrocells — 64 macrocells
Pin-to-Pin Logic Delay — 7 ns (speed grade -7)
User I/O Count — 34 I/O
Dedicated Input Pins — 4
Supply Voltage (VCCINT) — 3.3 V
I/O Bank Voltage (VCCIO) — 1.8 V / 2.5 V / 3.3 V / 5 V tolerant (multiVolt)
Program Memory Type — EEPROM (in-system programmable)
Programming Interface — IEEE 1149.1 JTAG
Operating Temperature Grade — Industrial (-40C to +85C)

数据手册与资源

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