EPM3064ATI44-4N vs EPM3064ALI44-10N 比較
詳細な並列比較: EPM3064ATI44-4N メーカー: Altera および EPM3064ALI44-10N メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EPM3064ATI44-4N | EPM3064ALI44-10N |
|---|---|---|
| ブランド | Altera | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | NRND | NRND |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $4.25 | $7.80 |
| Family | MAX 3000A | — |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Logic Elements / Macrocells | 64 macrocells | — |
| Usable Gates | 1,250 gates | — |
| Number of Logic Array Blocks (LABs) | 4 LABs (16 macrocells each) | — |
| Maximum Operating Frequency | 222.2 MHz | — |
| Pin-to-Pin Propagation Delay (tPD) | 4.5 ns (-4 speed grade) | — |
| Supply Voltage - Core (VCCINT) | 3.3 V | — |
| Supply Voltage - I/O (VCCIO) | 3.3 V or 2.5 V | — |
| User I/O Pins | 34 I/O | — |
| パッケージ | 44-pin TQFP | 44-pin PLCC (J-Lead) |
| 動作温度 | -40C to +85C (industrial) | -40 C to +85 C (Industrial) |
| Programming Interface | IEEE Std. 1149.1 JTAG, IEEE Std. 1532 ISP | IEEE Std. 1149.1 JTAG |
| Configuration Memory | EEPROM (non-volatile) | CMOS EEPROM (non-volatile) |
| 実装タイプ | Surface Mount | Surface Mount (socketable PLCC) |
| RoHS ステータス | [DATA_NEEDED: rohs status] | — |
| Series | — | MAX 3000A |
| Programmable Type | — | In System Programmable (ISP) |
| Number of Macrocells | — | 64 |
| Number of I/O | — | 34 |
| Logic Gates | — | 1250 gates |
| Number of Logic Elements/Blocks | — | 4 LABs |
| Propagation Delay (tPD) | — | 10 ns (speed grade -10) |
| Counter Frequency | — | up to 227.3 MHz |
| Supply Voltage - Core | — | 3.3 V |
| I/O Logic Level Support | — | 5.0 V / 3.3 V / 2.5 V (MultiVolt) |
| Lead Free / RoHS Status | — | Lead Free, RoHS Compliant |
| Hot-Socketing Support | — | Yes |