EPM3064ATI44-4N vs EPM3064ALI44-10N 对比
详细并排对比 EPM3064ATI44-4N 出自 Altera 和 EPM3064ALI44-10N 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EPM3064ATI44-4N | EPM3064ALI44-10N |
|---|---|---|
| 品牌 | Altera | Altera |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | 不推荐新设计 | 不推荐新设计 |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $4.25 | $7.80 |
| Family | MAX 3000A | — |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Logic Elements / Macrocells | 64 macrocells | — |
| Usable Gates | 1,250 gates | — |
| Number of Logic Array Blocks (LABs) | 4 LABs (16 macrocells each) | — |
| Maximum Operating Frequency | 222.2 MHz | — |
| Pin-to-Pin Propagation Delay (tPD) | 4.5 ns (-4 speed grade) | — |
| Supply Voltage - Core (VCCINT) | 3.3 V | — |
| Supply Voltage - I/O (VCCIO) | 3.3 V or 2.5 V | — |
| User I/O Pins | 34 I/O | — |
| 封装 | 44-pin TQFP | 44-pin PLCC (J-Lead) |
| 工作温度 | -40C to +85C (industrial) | -40 C to +85 C (Industrial) |
| Programming Interface | IEEE Std. 1149.1 JTAG, IEEE Std. 1532 ISP | IEEE Std. 1149.1 JTAG |
| Configuration Memory | EEPROM (non-volatile) | CMOS EEPROM (non-volatile) |
| 安装类型 | Surface Mount | Surface Mount (socketable PLCC) |
| RoHS 状态 | [DATA_NEEDED: rohs status] | — |
| Series | — | MAX 3000A |
| Programmable Type | — | In System Programmable (ISP) |
| Number of Macrocells | — | 64 |
| Number of I/O | — | 34 |
| Logic Gates | — | 1250 gates |
| Number of Logic Elements/Blocks | — | 4 LABs |
| Propagation Delay (tPD) | — | 10 ns (speed grade -10) |
| Counter Frequency | — | up to 227.3 MHz |
| Supply Voltage - Core | — | 3.3 V |
| I/O Logic Level Support | — | 5.0 V / 3.3 V / 2.5 V (MultiVolt) |
| Lead Free / RoHS Status | — | Lead Free, RoHS Compliant |
| Hot-Socketing Support | — | Yes |