EPM3512AFI256-10 vs EPM3512AFI256-7N 比較
詳細な並列比較: EPM3512AFI256-10 メーカー: Intel および EPM3512AFI256-7N メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
Altera
EPM3512AFI256-7N - MAX 3000A CPLD, 512 Macrocells | Intel / Altera
EPM3512AFI256-7N ⚠ ラストタイムバイ仕様比較
| パラメータ | EPM3512AFI256-10 | EPM3512AFI256-7N |
|---|---|---|
| ブランド | Intel | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | 有効 | ラストバイ |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $18.75 | $27.95 |
| Family | MAX 3000A | MAX 3000A |
| Product Type | CPLD (Complex Programmable Logic Device) | — |
| Equivalent Gates | 10,000 | — |
| Macrocells | 512 | — |
| User I/Os | 208 | — |
| Pin-to-Pin Logic Delay (tPD) | 4.5 ns | — |
| Maximum Counter Frequency | 227.3 MHz | — |
| Propagation Delay | 7.5 ns (max, per chipdig summary) | — |
| Core Voltage | 3.3 V | — |
| MultiVolt I/O Levels | 5.0 V / 3.3 V / 2.5 V | 2.5 V / 3.3 V / 5 V mixed |
| Process Technology | CMOS EEPROM | — |
| In-System Programmability | Yes, IEEE Std. 1532 (3.3 V ISP) | — |
| パッケージ | FBGA-256 (FineLine BGA, 256 balls) | 256-ball FBGA |
| 動作温度 | 0C to +70C (commercial) | — |
| Logic Family | CMOS | — |
| RoHS ステータス | [DATA_NEEDED: rohs_status] | — |
| 電源電圧 | 3.3 V (core); MultiVolt I/O to 5.0 V | — |
| Device Logic Elements / Macrocells | — | 512 macrocells |
| Typical Usable Gates | — | 10,000 gates |
| Logic Array Blocks (LABs) | — | 16 |
| Maximum User I/O Pins | — | [DATA_NEEDED: user I/O count] |
| Maximum Operating Frequency (fMAX) | — | 116.3 MHz |
| Pin-to-Pin Delay (tPD, speed grade -7) | — | approximately 7.5 ns |
| Supply Voltage (VCCINT) | — | 3.3 V |
| Configuration Memory | — | Non-volatile EEPROM |
| Programming Interface | — | IEEE 1149.1 JTAG (in-system programmable) |
| 動作温度範囲 | — | -40C to +85C (industrial) |
| Lead-Free / RoHS | — | Yes ('N' suffix, lead-free) |
| Design Software | — | Quartus II (legacy MAX 3000A support) |
| Speed Grade | — | -7 |
| 実装タイプ | — | Surface Mount (BGA) |