EPM3512AFI256-7N vs EPM3512AFI256-10N 比較
詳細な並列比較: EPM3512AFI256-7N メーカー: Altera および EPM3512AFI256-10N メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
Altera
EPM3512AFI256-7N - MAX 3000A CPLD, 512 Macrocells | Intel / Altera
EPM3512AFI256-7N ⚠ ラストタイムバイAltera
EPM3512AFI256-10N - 512-Macro MAX 3000A CPLD, 256-FBGA | Intel/Altera
EPM3512AFI256-10N ⚠ ラストタイムバイ仕様比較
| パラメータ | EPM3512AFI256-7N | EPM3512AFI256-10N |
|---|---|---|
| ブランド | Altera | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | ラストバイ | ラストバイ |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $27.95 | $21.75 |
| Family | MAX 3000A | MAX 3000A |
| Device Logic Elements / Macrocells | 512 macrocells | — |
| Typical Usable Gates | 10,000 gates | — |
| Logic Array Blocks (LABs) | 16 | — |
| Maximum User I/O Pins | [DATA_NEEDED: user I/O count] | — |
| Maximum Operating Frequency (fMAX) | 116.3 MHz | — |
| Pin-to-Pin Delay (tPD, speed grade -7) | approximately 7.5 ns | — |
| Supply Voltage (VCCINT) | 3.3 V | — |
| MultiVolt I/O Levels | 2.5 V / 3.3 V / 5 V mixed | — |
| Configuration Memory | Non-volatile EEPROM | — |
| Programming Interface | IEEE 1149.1 JTAG (in-system programmable) | — |
| パッケージ | 256-ball FBGA | 256-ball FineLine BGA (FBGA-256) |
| 動作温度範囲 | -40C to +85C (industrial) | -40 °C to +85 °C (industrial) |
| Lead-Free / RoHS | Yes ('N' suffix, lead-free) | — |
| Design Software | Quartus II (legacy MAX 3000A support) | — |
| Speed Grade | -7 | -10 (10 ns tPD) |
| 実装タイプ | Surface Mount (BGA) | Surface Mount |
| Series | — | EPM3512 |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Architecture | — | CMOS EEPROM-based, MAX architecture |
| Number of Macrocells | — | 512 |
| Number of Logic Array Blocks (LABs) | — | 16 |
| Usable Gates | — | Up to 10,000 |
| Number of User I/O | — | 208 |
| Total Pins | — | 256 |
| Pin-to-Pin Propagation Delay (tPD) | — | 10 ns |
| Maximum Counter Frequency | — | 227.3 MHz |
| Core Supply Voltage (VCCINT) | — | 3.3 V (3.0 V to 3.6 V) |
| I/O Supply Voltage (VCCIO) | — | 2.5 V or 3.3 V (5.0 V tolerant inputs) |
| MultiVolt I/O Support | — | 5.0 V / 3.3 V / 2.5 V |
| In-System Programmability | — | Yes - IEEE Std 1532 compliant |
| JTAG Boundary Scan | — | Yes - IEEE 1149.1 |
| Program Memory | — | EEPROM (non-volatile) |
| RoHS ステータス | — | Compliant |