EPM3512AQC210-7 vs EPM3512AQC208-7 比較
詳細な並列比較: EPM3512AQC210-7 メーカー: Altera および EPM3512AQC208-7 メーカー: Intel。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
Intel
EPM3512AQC208-7 - MAX 3000A CPLD, 512 Macrocells, 7.5ns, 208-PQFP | Intel
EPM3512AQC208-7 Nrnd仕様比較
| パラメータ | EPM3512AQC210-7 | EPM3512AQC208-7 |
|---|---|---|
| ブランド | Altera | Intel |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | NRND | NRND |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $21.85 | $41.72 |
| Family | MAX 3000A | MAX 3000A |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD (Complex Programmable Logic Device) |
| Macrocells | 512 | 512 |
| Logic Array Blocks (LABs) | 16 | — |
| Maximum User I/O Pins | 172 | — |
| Dedicated Input Pins | 12 | — |
| パッケージ | PQFP-208 | 208-Pin PQFP (FQFP, gull-wing) |
| ピン数 | 208 | — |
| 実装タイプ | Surface Mount | — |
| Operating Voltage (Core) | 3.3 V | — |
| Min Supply Voltage | 3.0 V | — |
| Max Supply Voltage | 3.6 V | — |
| I/O Voltage Support | 1.8 V / 2.5 V / 3.3 V / 5.0 V (MultiVolt I/O) | — |
| Pin-to-Pin Delay | 7 ns (speed grade -7) | — |
| Speed Grade | 7 ns | — |
| In-System Programmability | Yes (JTAG, IEEE 1149.1) | — |
| 動作温度 | [DATA_NEEDED: operating temperature range] | 0 C to +70 C (commercial) |
| Non-Volatile Configuration | Yes (EEPROM-based) | — |
| RoHS ステータス | [DATA_NEEDED: RoHS compliance] | Compliant |
| Usable Gates | — | 10,000 |
| Propagation Delay (tPD) | — | 7.5 ns |
| Counter Frequency (fCNT) | — | 116.3 MHz |
| User I/Os | — | 172 |
| Logic Elements / LEs | — | N/A (CPLD macrocell architecture) |
| Supply Voltage (VCCINT) | — | 3.3 V |
| I/O Standards Supported | — | 5.0 V, 3.3 V, 2.5 V (MultiVolt I/O) |
| Programming | — | In-System Programmable via JTAG (IEEE Std. 1532) |
| Process Technology | — | CMOS EEPROM, 0.30 um |
| Lead-Free | — | Yes |