EPM3512AQI20810 vs EPM3512AQC20810 比較
詳細な並列比較: EPM3512AQI20810 メーカー: Intel および EPM3512AQC20810 メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EPM3512AQI20810 | EPM3512AQC20810 |
|---|---|---|
| ブランド | Intel | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | NRND | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $21.10 | $16.80 |
| Family | MAX 3000A | MAX 3000A |
| Macrocells | 512 | — |
| Usable Gates | 10,000 | — |
| Logic Array Blocks (LABs) | 16 (32 macrocells each) | 16 |
| Maximum User I/O Pins | 172 | — |
| Pin-to-Pin Propagation Delay (tPD) | 10 ns | — |
| Internal fMAX (logic feedback) | 87 MHz | — |
| Supply Voltage (VCCINT) | 3.0 V to 3.6 V | — |
| MultiVolt I/O Interface | 1.8 V / 2.5 V / 3.3 V / 5.0 V compatible | — |
| パッケージ | 208-pin PQFP (PQ208) | 208-pin PQFP (PQ208) |
| 実装タイプ | Surface Mount | — |
| Process Technology | 0.30 µm CMOS EEPROM | 0.30 µm CMOS EEPROM |
| In-System Programmability | IEEE Std. 1149.1 JTAG + IEEE Std. 1532 | Yes (IEEE 1149.1 JTAG, 3.3 V ISP) |
| 動作温度 | -40 °C to +85 °C (Industrial, "I" suffix) | — |
| Lead-Free / RoHS | Contains lead / RoHS non-compliant (per Altera datasheet marking) | — |
| Logic Type | — | CPLD (EEPROM-based, non-volatile) |
| Macro Cells | — | 512 |
| User I/Os | — | 172 |
| Usable Gates (equivalent) | — | 10000 |
| Speed Grade | — | -10 (tPD = 10 ns) |
| Propagation Delay (tPD) | — | 10 ns |
| Maximum Internal Frequency | — | 132 MHz |
| Core Supply Voltage (VCCINT) | — | 3.3 V |
| I/O Supply Voltage (VCCIO) | — | 3.3 V |
| PCI Compliance | — | PCI Local Bus Specification Revision 2.2 compliant |
| Operating Temperature (commercial) | — | 0 °C to +70 °C |
| Configuration Memory | — | On-chip EEPROM, non-volatile, 100+ cycles, 10+ year retention |
| RoHS ステータス | — | [DATA_NEEDED: RoHS status] |