EPM3512AQI20810 vs EPM3512AQC20810 对比
详细并排对比 EPM3512AQI20810 出自 Intel 和 EPM3512AQC20810 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EPM3512AQI20810 | EPM3512AQC20810 |
|---|---|---|
| 品牌 | Intel | Altera |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | 不推荐新设计 | Obsolete |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $21.10 | $16.80 |
| Family | MAX 3000A | MAX 3000A |
| Macrocells | 512 | — |
| Usable Gates | 10,000 | — |
| Logic Array Blocks (LABs) | 16 (32 macrocells each) | 16 |
| Maximum User I/O Pins | 172 | — |
| Pin-to-Pin Propagation Delay (tPD) | 10 ns | — |
| Internal fMAX (logic feedback) | 87 MHz | — |
| Supply Voltage (VCCINT) | 3.0 V to 3.6 V | — |
| MultiVolt I/O Interface | 1.8 V / 2.5 V / 3.3 V / 5.0 V compatible | — |
| 封装 | 208-pin PQFP (PQ208) | 208-pin PQFP (PQ208) |
| 安装类型 | Surface Mount | — |
| Process Technology | 0.30 µm CMOS EEPROM | 0.30 µm CMOS EEPROM |
| In-System Programmability | IEEE Std. 1149.1 JTAG + IEEE Std. 1532 | Yes (IEEE 1149.1 JTAG, 3.3 V ISP) |
| 工作温度 | -40 °C to +85 °C (Industrial, "I" suffix) | — |
| Lead-Free / RoHS | Contains lead / RoHS non-compliant (per Altera datasheet marking) | — |
| Logic Type | — | CPLD (EEPROM-based, non-volatile) |
| Macro Cells | — | 512 |
| User I/Os | — | 172 |
| Usable Gates (equivalent) | — | 10000 |
| Speed Grade | — | -10 (tPD = 10 ns) |
| Propagation Delay (tPD) | — | 10 ns |
| Maximum Internal Frequency | — | 132 MHz |
| Core Supply Voltage (VCCINT) | — | 3.3 V |
| I/O Supply Voltage (VCCIO) | — | 3.3 V |
| PCI Compliance | — | PCI Local Bus Specification Revision 2.2 compliant |
| Operating Temperature (commercial) | — | 0 °C to +70 °C |
| Configuration Memory | — | On-chip EEPROM, non-volatile, 100+ cycles, 10+ year retention |
| RoHS 状态 | — | [DATA_NEEDED: RoHS status] |