EPM5032LC-20 vs EPM5032LC-15 比較
詳細な並列比較: EPM5032LC-20 メーカー: Altera および EPM5032LC-15 メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EPM5032LC-20 | EPM5032LC-15 |
|---|---|---|
| ブランド | Altera | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $8.40 | $8.20 |
| Device Family | MAX 5000 | — |
| Product Type | EPLD / CPLD (One-Time Programmable / UV-Erasable) | — |
| Usable Gates | 600 gates | 600 |
| Macrocells | 32 | 32 |
| Logic Blocks (LABs) | 1 | — |
| Speed Grade | -20 (20 ns pin-to-pin) | — |
| Maximum Frequency | 71.4 MHz | — |
| Propagation Delay (tPD) | 20 ns | — |
| Supply Voltage (VCC) | 5 V ±5% | 5 V (4.75 V to 5.25 V) |
| 動作温度 | 0 °C to +70 °C (commercial; -55 °C to +125 °C military per /883B variants) | 0C to +70C (commercial) |
| Dedicated Inputs | 7 | 7 |
| Bidirectional I/O Pins | 16 | 16 |
| Total Inputs | 24 | — |
| Output Functions | 16 | — |
| Product Terms per Output | 16 | — |
| Programmable Interconnect | Programmable Interconnect Array (PIA) | — |
| パッケージ | LCC-28 (Plastic Leaded Chip Carrier, J-lead) | JLCC-28 (windowed ceramic) |
| 実装タイプ | Surface Mount | — |
| RoHS ステータス | [DATA_NEEDED: RoHS status] | Non-compliant (contains Pb, ceramic-windowed package) |
| MSLレベル | [DATA_NEEDED: MSL] | — |
| Family | — | MAX 5000 EPLD |
| Architecture | — | PAL-type AND/OR with PIA |
| Logic Array Blocks (LABs) | — | 4 |
| Maximum Operating Frequency | — | 83.3 MHz |
| Pin-to-Pin Delay (tPD) | — | 15 ns |
| Technology | — | CMOS EPROM, 1.0 um process |
| Programmability | — | UV-Erasable / OTP |