EPM5032LC-20 vs EPM5032LC-15 비교
다음의 상세 나란히 비교: EPM5032LC-20 제조: Altera 및 EPM5032LC-15 제조: Altera. 주요 사양, 전기적 파라미터, 패키징, 수명 주기 상태, 가격 및 재고를 비교하여 설계 요구 사항에 가장 적합한 부품을 결정하십시오.
사양 비교
| 파라미터 | EPM5032LC-20 | EPM5032LC-15 |
|---|---|---|
| 브랜드 | Altera | Altera |
| 카테고리 | FPGA & CPLD | FPGA & CPLD |
| 수명 주기 상태 | Obsolete | Obsolete |
| 재고 상태 | In Stock | In Stock |
| 단가 (USD) | $8.40 | $8.20 |
| Device Family | MAX 5000 | — |
| Product Type | EPLD / CPLD (One-Time Programmable / UV-Erasable) | — |
| Usable Gates | 600 gates | 600 |
| Macrocells | 32 | 32 |
| Logic Blocks (LABs) | 1 | — |
| Speed Grade | -20 (20 ns pin-to-pin) | — |
| Maximum Frequency | 71.4 MHz | — |
| Propagation Delay (tPD) | 20 ns | — |
| Supply Voltage (VCC) | 5 V ±5% | 5 V (4.75 V to 5.25 V) |
| 동작 온도 | 0 °C to +70 °C (commercial; -55 °C to +125 °C military per /883B variants) | 0C to +70C (commercial) |
| Dedicated Inputs | 7 | 7 |
| Bidirectional I/O Pins | 16 | 16 |
| Total Inputs | 24 | — |
| Output Functions | 16 | — |
| Product Terms per Output | 16 | — |
| Programmable Interconnect | Programmable Interconnect Array (PIA) | — |
| 패키지 | LCC-28 (Plastic Leaded Chip Carrier, J-lead) | JLCC-28 (windowed ceramic) |
| 실장 유형 | Surface Mount | — |
| RoHS 상태 | [DATA_NEEDED: RoHS status] | Non-compliant (contains Pb, ceramic-windowed package) |
| MSL 레벨 | [DATA_NEEDED: MSL] | — |
| Family | — | MAX 5000 EPLD |
| Architecture | — | PAL-type AND/OR with PIA |
| Logic Array Blocks (LABs) | — | 4 |
| Maximum Operating Frequency | — | 83.3 MHz |
| Pin-to-Pin Delay (tPD) | — | 15 ns |
| Technology | — | CMOS EPROM, 1.0 um process |
| Programmability | — | UV-Erasable / OTP |