EPM5128JI vs EPM5130JI 比較
詳細な並列比較: EPM5128JI メーカー: Intel および EPM5130JI メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EPM5128JI | EPM5130JI |
|---|---|---|
| ブランド | Intel | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $23.95 | $9.75 |
| Device Family | MAX 5000 | — |
| Device Type | UV-erasable programmable logic device (PLD) | UV-Erasable EPLD (CMOS EPROM) |
| Macrocells | 128 | 128 |
| Propagation Delay (tPD) | 55 ns (typical) | 55 ns |
| Maximum Internal Frequency | 40 MHz | — |
| Process Technology | CMOS | 0.75 micron CMOS EPROM |
| Programmable Technology | UV-erasable EPROM cell | — |
| パッケージ | 68-terminal ceramic CQCC, windowed, J-leads | — |
| Operating Temperature Grade | Industrial ("I" suffix) | — |
| Programming | Altera MAX+plus II compatible programmer + UV eraser | — |
| RoHS ステータス | Non-compliant (ceramic hermetic package) | Non-compliant (contains Pb in ceramic package) |
| Lead Finish | Tin-lead (SnPb) over nickel | — |
| 実装タイプ | Surface Mount (J-lead CQCC) | — |
| Logic Blocks | [DATA_NEEDED: number of LABs / logic array blocks] | — |
| User I/O Pins | [DATA_NEEDED: pin count of user I/Os] | — |
| 電源電圧 | [DATA_NEEDED: VCC range] | 5 V (typical) |
| Standby Current | [DATA_NEEDED: ICCSB] | — |
| Family | — | MAX 5000 |
| Logic Array Blocks (LABs) | — | 8 |
| 最大クロック周波数 | — | 33.3 MHz |
| External Clock Inputs | — | 1 (shared input/clock) |
| Interconnect | — | Programmable Interconnect Array (PIA) |
| Input Logic Standard | — | TTL-compatible |
| Package Type | — | Ceramic J-Leaded Chip Carrier (JLCC) with UV window |
| 動作温度 | — | Commercial (0C to +70C) |
| Program/Erase Method | — | UV erasure through quartz window |
| Lifecycle | — | Obsolete - EOL by Altera/Intel |