EPM5128JI vs EPM5130JI 对比
详细并排对比 EPM5128JI 出自 Intel 和 EPM5130JI 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EPM5128JI | EPM5130JI |
|---|---|---|
| 品牌 | Intel | Altera |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | Obsolete | Obsolete |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $23.95 | $9.75 |
| Device Family | MAX 5000 | — |
| Device Type | UV-erasable programmable logic device (PLD) | UV-Erasable EPLD (CMOS EPROM) |
| Macrocells | 128 | 128 |
| Propagation Delay (tPD) | 55 ns (typical) | 55 ns |
| Maximum Internal Frequency | 40 MHz | — |
| Process Technology | CMOS | 0.75 micron CMOS EPROM |
| Programmable Technology | UV-erasable EPROM cell | — |
| 封装 | 68-terminal ceramic CQCC, windowed, J-leads | — |
| Operating Temperature Grade | Industrial ("I" suffix) | — |
| Programming | Altera MAX+plus II compatible programmer + UV eraser | — |
| RoHS 状态 | Non-compliant (ceramic hermetic package) | Non-compliant (contains Pb in ceramic package) |
| Lead Finish | Tin-lead (SnPb) over nickel | — |
| 安装类型 | Surface Mount (J-lead CQCC) | — |
| Logic Blocks | [DATA_NEEDED: number of LABs / logic array blocks] | — |
| User I/O Pins | [DATA_NEEDED: pin count of user I/Os] | — |
| 电源电压 | [DATA_NEEDED: VCC range] | 5 V (typical) |
| Standby Current | [DATA_NEEDED: ICCSB] | — |
| Family | — | MAX 5000 |
| Logic Array Blocks (LABs) | — | 8 |
| 最大时钟频率 | — | 33.3 MHz |
| External Clock Inputs | — | 1 (shared input/clock) |
| Interconnect | — | Programmable Interconnect Array (PIA) |
| Input Logic Standard | — | TTL-compatible |
| Package Type | — | Ceramic J-Leaded Chip Carrier (JLCC) with UV window |
| 工作温度 | — | Commercial (0C to +70C) |
| Program/Erase Method | — | UV erasure through quartz window |
| Lifecycle | — | Obsolete - EOL by Altera/Intel |