EPM5128LC2 vs EPM5128GC2 比較
詳細な並列比較: EPM5128LC2 メーカー: Altera および EPM5128GC2 メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EPM5128LC2 | EPM5128GC2 |
|---|---|---|
| ブランド | Altera | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | ラストバイ | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $22.40 | $54.00 |
| Family | MAX 5000 | MAX 5000 |
| Device Type | CPLD (Complex Programmable Logic Device) | EPLD (Erasable Programmable Logic Device) |
| Macrocells | 128 | — |
| Logic Array Blocks (LABs) | 8 | 8 (16 macro cells each) |
| Interconnect | Programmable Interconnect Array (PIA) | — |
| Global Clock Inputs | 1 dedicated | — |
| Propagation Delay (tPD) | 45 ns | — |
| Supply Voltage (VCC) | 5 V | — |
| Process Technology | CMOS EPROM | CMOS EPROM |
| Configuration Memory | On-chip EPROM (non-volatile) | On-chip EPROM (no external boot device) |
| Boundary Scan | JTAG / IEEE 1149.1 | — |
| 動作温度 | -40 C to +85 C (extended commercial) | [DATA_NEEDED: operating temperature range] |
| パッケージ | PGA (Pin Grid Array, ceramic) | Ceramic PGA (GC, windowed) |
| 実装タイプ | Through-Hole / Socketed | — |
| RoHS ステータス | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| Macro Cells | — | 128 |
| Usable Gates | — | 2.5K |
| Maximum Internal Frequency | — | 50 MHz |
| Supply Voltage VCC | — | 5 V |
| I/O Pins | — | 64 |
| Dedicated Inputs | — | 16 |
| Programmable Flip-Flop Modes | — | D / T / JK / SR (selectable) |
| Architecture | — | AND/OR plane + programmable macro cell + PIA |
| Reprogrammability | — | UV-erasable (windowed ceramic package) |
| ピン数 | — | [DATA_NEEDED: total PGA pin count] |