EPM5128LC2 vs EPM5128GC2 对比

详细并排对比 EPM5128LC2 出自 Altera 和 EPM5128GC2 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

Altera
EPM5128LC2 EPM5128LC2 - 128-Macrocell MAX 5000 CPLD, 45ns, 5V | Altera

EPM5128LC2 - 128-Macrocell MAX 5000 CPLD, 45ns, 5V | Altera

EPM5128LC2 ⚠ 最后一次采购

规格对比

参数 EPM5128LC2 EPM5128GC2
品牌 Altera Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 最后采购期 Obsolete
库存状态 有库存 有库存
单价(USD) $22.40 $54.00
Family MAX 5000 MAX 5000
Device Type CPLD (Complex Programmable Logic Device) EPLD (Erasable Programmable Logic Device)
Macrocells 128 —
Logic Array Blocks (LABs) 8 8 (16 macro cells each)
Interconnect Programmable Interconnect Array (PIA) —
Global Clock Inputs 1 dedicated —
Propagation Delay (tPD) 45 ns —
Supply Voltage (VCC) 5 V —
Process Technology CMOS EPROM CMOS EPROM
Configuration Memory On-chip EPROM (non-volatile) On-chip EPROM (no external boot device)
Boundary Scan JTAG / IEEE 1149.1 —
工作温度 -40 C to +85 C (extended commercial) [DATA_NEEDED: operating temperature range]
封装 PGA (Pin Grid Array, ceramic) Ceramic PGA (GC, windowed)
安装类型 Through-Hole / Socketed —
RoHS 状态 [DATA_NEEDED: RoHS status] [DATA_NEEDED: RoHS status]
Macro Cells — 128
Usable Gates — 2.5K
Maximum Internal Frequency — 50 MHz
Supply Voltage VCC — 5 V
I/O Pins — 64
Dedicated Inputs — 16
Programmable Flip-Flop Modes — D / T / JK / SR (selectable)
Architecture — AND/OR plane + programmable macro cell + PIA
Reprogrammability — UV-erasable (windowed ceramic package)
引脚数量 — [DATA_NEEDED: total PGA pin count]

数据手册与资源

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