EPM5192AGC-15 vs EPM51929C 比較
詳細な並列比較: EPM5192AGC-15 メーカー: Altera および EPM51929C メーカー: Intel。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EPM5192AGC-15 | EPM51929C |
|---|---|---|
| ブランド | Altera | Intel |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $27.80 | $9.40 |
| Product Type | EPLD (Erasable Programmable Logic Device) | — |
| Series | MAX 5000 | — |
| Macrocells | 192 | — |
| Logic Array Blocks | 16 (typical for 192-macrocell MAX 5000) | — |
| Maximum User I/O Pins | 64 | — |
| Dedicated Inputs | 7 | — |
| Total Inputs | 72 | — |
| Propagation Delay (tPD) | 15 ns (pin-to-pin, -15 speed grade) | — |
| Supply Voltage (VCC) | 5 V | — |
| Technology | CMOS, UV-erasable EPROM | CMOS EPROM |
| パッケージ | Ceramic Pin Grid Array (PGA) | — |
| Programming Method | UV erase + EPROM program (via Altera programmer) | — |
| 動作温度 | [DATA_NEEDED: operating temperature range] | Commercial (0C to +70C) |
| RoHS ステータス | [DATA_NEEDED: RoHS status - legacy ceramic PGA typically non-compliant] | unknown |
| ライフサイクル状態 | Obsolete / Last Time Buy (per Altera legacy product list) | — |
| Device Family | — | MAX 5000 |
| Device Type | — | EPLD (Erasable Programmable Logic Device) |
| Architecture | — | Multi-array matrix (PAL-based macrocells) |
| Logic Density | — | [DATA_NEEDED: usable gates] |
| Number of Macrocells | — | [DATA_NEEDED: macrocell count] |
| ピン数 | — | [DATA_NEEDED: pin count] |
| Package Type | — | [DATA_NEEDED: package suffix - C denotes commercial temperature grade] |
| Programmability | — | UV-erasable, JEDEC fuse map |
| 電源電圧 | — | [DATA_NEEDED: VCC range] |
| Propagation Delay | — | [DATA_NEEDED: tpd specification] |
| Maximum Toggle Frequency | — | [DATA_NEEDED: fmax] |
| 実装タイプ | — | Surface Mount or Through-Hole (package dependent) |
| Lead-Free | — | unknown |
| MSLレベル | — | [DATA_NEEDED] |