EPM5192AGC-15 vs EPM51929C 对比
详细并排对比 EPM5192AGC-15 出自 Altera 和 EPM51929C 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EPM5192AGC-15 | EPM51929C |
|---|---|---|
| 品牌 | Altera | Intel |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | Obsolete | Obsolete |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $27.80 | $9.40 |
| Product Type | EPLD (Erasable Programmable Logic Device) | — |
| Series | MAX 5000 | — |
| Macrocells | 192 | — |
| Logic Array Blocks | 16 (typical for 192-macrocell MAX 5000) | — |
| Maximum User I/O Pins | 64 | — |
| Dedicated Inputs | 7 | — |
| Total Inputs | 72 | — |
| Propagation Delay (tPD) | 15 ns (pin-to-pin, -15 speed grade) | — |
| Supply Voltage (VCC) | 5 V | — |
| Technology | CMOS, UV-erasable EPROM | CMOS EPROM |
| 封装 | Ceramic Pin Grid Array (PGA) | — |
| Programming Method | UV erase + EPROM program (via Altera programmer) | — |
| 工作温度 | [DATA_NEEDED: operating temperature range] | Commercial (0C to +70C) |
| RoHS 状态 | [DATA_NEEDED: RoHS status - legacy ceramic PGA typically non-compliant] | unknown |
| 生命周期状态 | Obsolete / Last Time Buy (per Altera legacy product list) | — |
| Device Family | — | MAX 5000 |
| Device Type | — | EPLD (Erasable Programmable Logic Device) |
| Architecture | — | Multi-array matrix (PAL-based macrocells) |
| Logic Density | — | [DATA_NEEDED: usable gates] |
| Number of Macrocells | — | [DATA_NEEDED: macrocell count] |
| 引脚数 | — | [DATA_NEEDED: pin count] |
| Package Type | — | [DATA_NEEDED: package suffix - C denotes commercial temperature grade] |
| Programmability | — | UV-erasable, JEDEC fuse map |
| 电源电压 | — | [DATA_NEEDED: VCC range] |
| Propagation Delay | — | [DATA_NEEDED: tpd specification] |
| Maximum Toggle Frequency | — | [DATA_NEEDED: fmax] |
| 安装类型 | — | Surface Mount or Through-Hole (package dependent) |
| Lead-Free | — | unknown |
| MSL 等级 | — | [DATA_NEEDED] |