EPM5192AGC-15 vs EPM5192AQC-2 比較
詳細な並列比較: EPM5192AGC-15 メーカー: Altera および EPM5192AQC-2 メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EPM5192AGC-15 | EPM5192AQC-2 |
|---|---|---|
| ブランド | Altera | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $27.80 | $21.50 |
| Product Type | EPLD (Erasable Programmable Logic Device) | — |
| Series | MAX 5000 | MAX 5000 (EPM5192) |
| Macrocells | 192 | 192 |
| Logic Array Blocks | 16 (typical for 192-macrocell MAX 5000) | — |
| Maximum User I/O Pins | 64 | — |
| Dedicated Inputs | 7 | 7 |
| Total Inputs | 72 | 72 |
| Propagation Delay (tPD) | 15 ns (pin-to-pin, -15 speed grade) | 45 ns (-2 speed grade) |
| Supply Voltage (VCC) | 5 V | — |
| Technology | CMOS, UV-erasable EPROM | — |
| パッケージ | Ceramic Pin Grid Array (PGA) | 100-pin PQFP (R-PQFP-G100) |
| Programming Method | UV erase + EPROM program (via Altera programmer) | — |
| 動作温度 | [DATA_NEEDED: operating temperature range] | [DATA_NEEDED: commercial / industrial / military grade] |
| RoHS ステータス | [DATA_NEEDED: RoHS status - legacy ceramic PGA typically non-compliant] | [DATA_NEEDED: confirmed compliance status] |
| ライフサイクル状態 | Obsolete / Last Time Buy (per Altera legacy product list) | — |
| Device Type | — | UV-Erasable / OTP Complex PLD (CPLD) |
| User I/O Pins | — | 64 |
| 最大クロック周波数 | — | [DATA_NEEDED: max fMAX for -2 grade] |
| Process Technology | — | CMOS |
| Switch Matrix | — | UV-Erasable / OTP (windowless on AQC package) |
| Lead Pitch | — | 0.635 mm |
| Terminal Form | — | Gull-wing |
| 実装タイプ | — | Surface Mount |
| Programming Interface | — | JTAG (IEEE 1149.1) boundary scan |