EPM5192AGC-15 vs EPM5192AQC-2 对比

详细并排对比 EPM5192AGC-15 出自 Altera 和 EPM5192AQC-2 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPM5192AGC-15 EPM5192AQC-2
品牌 Altera Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $27.80 $21.50
Product Type EPLD (Erasable Programmable Logic Device) —
Series MAX 5000 MAX 5000 (EPM5192)
Macrocells 192 192
Logic Array Blocks 16 (typical for 192-macrocell MAX 5000) —
Maximum User I/O Pins 64 —
Dedicated Inputs 7 7
Total Inputs 72 72
Propagation Delay (tPD) 15 ns (pin-to-pin, -15 speed grade) 45 ns (-2 speed grade)
Supply Voltage (VCC) 5 V —
Technology CMOS, UV-erasable EPROM —
封装 Ceramic Pin Grid Array (PGA) 100-pin PQFP (R-PQFP-G100)
Programming Method UV erase + EPROM program (via Altera programmer) —
工作温度 [DATA_NEEDED: operating temperature range] [DATA_NEEDED: commercial / industrial / military grade]
RoHS 状态 [DATA_NEEDED: RoHS status - legacy ceramic PGA typically non-compliant] [DATA_NEEDED: confirmed compliance status]
生命周期状态 Obsolete / Last Time Buy (per Altera legacy product list) —
Device Type — UV-Erasable / OTP Complex PLD (CPLD)
User I/O Pins — 64
最大时钟频率 — [DATA_NEEDED: max fMAX for -2 grade]
Process Technology — CMOS
Switch Matrix — UV-Erasable / OTP (windowless on AQC package)
Lead Pitch — 0.635 mm
Terminal Form — Gull-wing
安装类型 — Surface Mount
Programming Interface — JTAG (IEEE 1149.1) boundary scan

数据手册与资源

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