EPM5192AJC-15 vs EPM5192AJC84-15 比較
詳細な並列比較: EPM5192AJC-15 メーカー: Intel および EPM5192AJC84-15 メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
Altera
EPM5192AJC84-15 - MAX 5000 CPLD, 192 Macrocells, 84-pin PLCC | Altera
EPM5192AJC84-15 Obsolete仕様比較
| パラメータ | EPM5192AJC-15 | EPM5192AJC84-15 |
|---|---|---|
| ブランド | Intel | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | NRND | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $9.85 | $18.95 |
| Family | MAX 5000 | MAX 5000 |
| Device Type | EPLD (Erasable Programmable Logic Device) | EPLD (Erasable Programmable Logic Device) |
| Macrocells | 192 | 192 |
| Logic Capacity | 100% connectivity, sum-of-products PLA architecture | — |
| Pin-to-Pin Delay (tPD) | 15 ns | — |
| Supply Voltage (VCC) | 5 V (4.75 V to 5.25 V) | 5 V (single supply) |
| 動作温度 | 0C to +70C (commercial) | [DATA_NEEDED: commercial/industrial/military grade] |
| パッケージ | 84-pin PLCC (J-lead, ceramic, non-windowed) | 84-pin PLCC (J84C) windowed ceramic |
| 実装タイプ | Surface Mount | Surface Mount |
| Programmability | UV-erasable (windowed variant) / One-Time-Programmable | — |
| Toolchain | MAX+PLUS II | — |
| RoHS ステータス | [DATA_NEEDED: RoHS compliance] | Non-compliant (contains Pb, ceramic windowed package) |
| ピン数 | 84 | — |
| User I/O Pins | [DATA_NEEDED: user I/O count] | — |
| Speed Grades Available | -15, -20, -25 (this part: -15) | — |
| Configuration Memory | EPROM (UV-erasable) | — |
| Propagation Delay (tpd) | — | 15 ns |
| Maximum Clock Frequency (fMAX) | — | 83.3 MHz |
| Technology | — | CMOS, UV-erasable EPROM |
| Programming Method | — | UV-erase + EPROM programming (windowed package) |
| Logic Blocks | — | 16 Logic Array Blocks (LABs) |
| I/O Pins | — | [DATA_NEEDED: user I/O count] |
| Process Technology | — | CMOS EPROM |