EPM5192AJI84-15 vs EPM5192AGC84-15 比較
詳細な並列比較: EPM5192AJI84-15 メーカー: Altera および EPM5192AGC84-15 メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EPM5192AJI84-15 | EPM5192AGC84-15 |
|---|---|---|
| ブランド | Altera | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $27.80 | $42.00 |
| Device Family | MAX 5000 EPLD | — |
| Product Type | UV-Erasable / OTP Complex PLD | — |
| Macrocells | 192 | 192 |
| Logic Array Blocks (LABs) | 16 | 12 |
| User I/O Pins | 84 | 64 |
| Propagation Delay (tPD) | 15 ns | 15 ns |
| Supply Voltage (VCC) | 4.5 V to 5.5 V (nominal 5 V) | 4.5 V to 5.5 V |
| Process Technology | CMOS EPROM (UV-erasable) | CMOS |
| Package Type | 84-pin JLCC (J-Leaded Ceramic Chip Carrier) with quartz window | — |
| 実装タイプ | Through-Hole (SMD socket-compatible) | Through-Hole |
| 動作温度 | -40 °C to +85 °C (Industrial, 'I' suffix) | Commercial (0C to +70C) - [DATA_NEEDED: military/industrial temp grade range] |
| Programming Method | UV erase + EPROM program via standard Altera programmer | — |
| Design Tool Support | MAX+PLUS II (legacy); not supported by modern Quartus Prime | — |
| RoHS ステータス | unknown | [DATA_NEEDED: not declared in web data; ceramic PGA with UV window typically non-RoHS] |
| Lead-Free | unknown | — |
| ハロゲンフリー | unknown | — |
| Functional Equivalent (Plastic OTP) | EPM5192AJC84-15 (windowless plastic JLCC, same die) | — |
| Family | — | MAX 5000 |
| Device Type | — | UV-Erasable/OTP Complex PLD |
| Dedicated Inputs | — | 7 |
| Maximum Internal Clock Frequency | — | 83.3 MHz |
| Programmable Element | — | UV-Erasable EPROM cell |
| パッケージ | — | 84-pin Ceramic PGA (Pin Grid Array) |