EPM570F256C3N vs EPM570F256C5NRR 比較
詳細な並列比較: EPM570F256C3N メーカー: Intel および EPM570F256C5NRR メーカー: Intel。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EPM570F256C3N | EPM570F256C5NRR |
|---|---|---|
| ブランド | Intel | Intel |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | 有効 | 有効 |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $13.75 | $10.90 |
| Family | MAX II | MAX II (CPLD) |
| Logic Elements (LEs) | 570 | — |
| Equivalent Macrocells | 440 | — |
| User Flash Memory (UFM) | 8 Kbits | 8 Kbytes |
| Maximum Operating Frequency | 304 MHz | — |
| Process Technology | 0.18 um, 6-layer-metal flash CMOS | 0.18 µm flash CMOS |
| Core Voltage | 2.5 V / 3.3 V | — |
| I/O Voltage Support (MultiVolt) | 1.5 V, 1.8 V, 2.5 V, 3.3 V | — |
| パッケージ | 256-ball FBGA (FineLine BGA) | 256-ball FBGA (FineLine BGA) |
| User I/O Count | [DATA_NEEDED: confirm exact user-IO count for F256 package] | — |
| Operating Temperature (C3 grade) | 0 C to +85 C (commercial) | — |
| Programming Interface | JTAG (IEEE 1532 / IEEE 1149.1) + ISP | JTAG (IEEE 1149.1), in-system programmable |
| 実装タイプ | Surface Mount | Surface Mount |
| MSLレベル | [DATA_NEEDED: MSL level not stated in provided data] | — |
| RoHS ステータス | Compliant (per DigiKey listing) | Compliant |
| Lead-Free | Yes (per suffix 'N' convention) | — |
| Typical Macroscopic Functions | Glue logic, bus bridging, I/O expansion, power sequencing | — |
| Series | — | MAX II |
| Logic Elements | — | 570 |
| Macro Cells | — | 440 |
| Pin-to-Pin Delay (tPD) | — | 8.7 ns (C5 speed grade) |
| Internal fMAX | — | 201.1 MHz |
| Maximum User I/O Pins | — | 212 (typical, 256-BGA) |
| Operating Supply Voltage - Core (VCCINT) | — | 2.5 V (3.3 V tolerant) |
| Operating Supply Voltage - I/O (VCCIO) | — | 2.5 V or 3.3 V |
| 動作温度 | — | 0 °C to +85 °C (commercial, C-speed grade) |
| Configuration Memory | — | On-chip non-volatile flash |