EPM570M100C5N vs EPM570M100I5N 比較
詳細な並列比較: EPM570M100C5N メーカー: Intel および EPM570M100I5N メーカー: Intel。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EPM570M100C5N | EPM570M100I5N |
|---|---|---|
| ブランド | Intel | Intel |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | 有効 | 有効 |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $11.85 | $8.75 |
| Family | MAX II | MAX II |
| Series | EPM570 | — |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD (Complex Programmable Logic Device) |
| Macrocell Count | 440 | — |
| Logic Elements | 570 | — |
| User I/Os | 76 | 76 |
| Number of Logic Blocks / Array Blocks | [DATA_NEEDED: number of LABs] | — |
| ピン数 | 100 | — |
| パッケージ | 100-MBGA (FineLine BGA, 6 x 6 mm, 0.5 mm pitch) | — |
| Maximum Frequency (fMAX) | 201.1 MHz | — |
| Pin-to-Pin Propagation Delay | 5.4 ns | — |
| Operating Supply Voltage (Core) | 2.5 V / 3.3 V | — |
| I/O Voltage Support | 1.5 V / 1.8 V / 2.5 V / 3.3 V (MultiVolt) | — |
| On-Chip User Flash Memory (UFM) | 8 Kbits | — |
| Process Technology | 0.18 um, 6-layer-metal flash | 0.18 µm CMOS |
| Programming Interface | JTAG (IEEE 1149.1) and ISP | — |
| 動作温度範囲 | 0 C to +85 C (Commercial) | — |
| 実装タイプ | Surface Mount (BGA) | Surface Mount |
| RoHS ステータス | Lead-Free / Compliant | — |
| Moisture Sensitivity Level | [DATA_NEEDED: MSL level] | — |
| Number of Macrocells | — | 440 |
| Number of Logic Array Blocks | — | 4 LABs (110 macrocells each) |
| Maximum Operating Frequency | — | 201.1 MHz |
| Pin-to-Pin Logic Delay | — | 5.4 ns |
| User Flash Memory | — | 8 Kbits |
| Supply Voltage - Core (VCCINT) | — | 2.5 V / 3.3 V |
| Supply Voltage - I/O (VCCIO) | — | 1.5 V / 1.8 V / 2.5 V / 3.3 V (banked) |
| Package Type | — | 100-MBGA (Micro FBGA) |
| Package Size | — | 6 x 6 mm, 0.5 mm pitch |
| 動作温度 | — | -40°C to +100°C (I5 grade) |
| Lead-Free / RoHS | — | Lead Free, RoHS Compliant |
| Programmability | — | In-System via JTAG (IEEE 1149.1), non-volatile |
| Design Software | — | Altera Quartus II / Quartus Prime |