EPM570T100A5N vs EPM570GT100C5N 比較
詳細な並列比較: EPM570T100A5N メーカー: Altera および EPM570GT100C5N メーカー: Intel。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EPM570T100A5N | EPM570GT100C5N |
|---|---|---|
| ブランド | Altera | Intel |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | 有効 | 有効 |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $6.72 | $11.05 |
| Device Family | MAX II | — |
| Logic Elements | 570 | 570 |
| Macrocells | 440 | — |
| User I/O Pins | 76 | — |
| Number of Logic Array Blocks (LABs) | 57 | — |
| パッケージ | 100-pin TQFP | TQFP-100 |
| Pin-to-Pin Logic Delay (tPD) | 5.4 ns | — |
| Maximum Internal Frequency | 304 MHz | — |
| Core Supply Voltage (VCCINT) | 1.8 V (typical) | — |
| I/O Supply Voltage (VCCIO) | 1.5 V / 1.8 V / 2.5 V / 3.3 V (MultiVolt) | — |
| User Flash Memory (UFM) | 8 Kbits | 8 Kbit |
| Configuration Memory | On-chip non-volatile flash | — |
| Programming Interface | JTAG (IEEE 1149.1) - ISP | — |
| 動作温度 | -40 °C to +125 °C (industrial) | 0C to +85C (Commercial) |
| 実装タイプ | Surface Mount | Surface Mount |
| RoHS ステータス | Compliant | Compliant |
| Series | — | MAX II |
| Equivalent Macrocells | — | 440 |
| User I/O | — | 76 |
| LABs | — | 36 |
| Maximum Frequency | — | 304 MHz |
| Pin-to-Pin Delay | — | [DATA_NEEDED: tPD value] |
| Operating Supply Voltage (VCCINT) | — | 2.5 V / 3.3 V |
| I/O Standards Supported | — | 1.5 V, 1.8 V, 2.5 V, 3.3 V LVTTL/LVCMOS |
| Programmability | — | Flash-based, non-volatile (ISP via JTAG) |
| JTAG Support | — | IEEE 1149.1 boundary scan |