EPM570T144C4N vs EPM570T144-5 比較
詳細な並列比較: EPM570T144C4N メーカー: Intel および EPM570T144-5 メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EPM570T144C4N | EPM570T144-5 |
|---|---|---|
| ブランド | Intel | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | 有効 | 有効 |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $25.10 | $9.85 |
| Family | MAX II | MAX II |
| Logic Elements (LE) | 570 | 570 |
| Equivalent Macrocells | 440 | — |
| Maximum User I/O Pins | 212 (package-dependent; TQFP-144 user count varies) | — |
| User Flash Memory (UFM) | 8 Kbits | 8 Kbits |
| Process Technology | 0.18 µm flash CMOS, 6-layer metal | 0.18 µm |
| Maximum Internal Frequency (fMAX) | 247.5 MHz | — |
| Pin-to-Pin Propagation Delay (tPD) | 5.4 ns (C4 speed grade) | — |
| Core Supply Voltage (VCCINT) | 2.5 V / 3.3 V (MultiVolt core) | — |
| I/O Supply Voltage (VCCIO) | 1.5 V / 1.8 V / 2.5 V / 3.3 V (MultiVolt I/O) | — |
| Programming Interface | JTAG (IEEE 1149.1) with in-system programmability (ISP) | JTAG (IEEE 1149.1 / IEEE 1532) |
| 動作温度 | -40 °C to +85 °C (industrial, suffix N) | [DATA_NEEDED: temperature grade for -5 suffix] |
| パッケージ | TQFP-144 (22 × 22 mm, 0.5 mm pitch) | TQFP-144 (T144) |
| 実装タイプ | Surface Mount | — |
| MSLレベル | 3 (per JEDEC J-STD-020) | — |
| Lead-Free / RoHS | Lead-free, RoHS compliant | — |
| Global Clock Networks | 4 | — |
| Non-Volatile Configuration | Yes (instant-on, no external boot PROM required) | — |
| Device | — | EPM570 |
| Macrocells (typical) | — | 440 |
| User I/O Pins | — | 116 |
| ピン数 | — | 144 |
| Speed Grade | — | -5 (≈5.0 ns tPD1) |
| Non-volatile Configuration | — | Internal Flash (instant-on) |
| I/O Banks | — | 4 |
| MultiVolt I/O Support | — | 1.5 V, 1.8 V, 2.5 V, 3.3 V |
| VCCINT | — | 3.3 V or 2.5 V (per bank group) |
| RoHS ステータス | — | Depends on date code (pre-2010 lots non-RoHS; lead-free Pb-free opt. available) |