EPM570ZM256C7N vs EPM570ZF256C7N 比較
詳細な並列比較: EPM570ZM256C7N メーカー: Altera および EPM570ZF256C7N メーカー: Intel。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EPM570ZM256C7N | EPM570ZF256C7N |
|---|---|---|
| ブランド | Altera | Intel |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | 有効 | 有効 |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $9.95 | $17.85 |
| Series | MAX II Z | MAX II |
| Family | MAX II | — |
| Logic Elements (LE) | 570 | 440 |
| Macro Cells | 440 | 440 |
| User I/Os | 76 | — |
| User Flash Memory | 8 Kbits | — |
| Maximum Operating Frequency | 123.5 MHz | 201 MHz (internal) |
| Pin-to-Pin Delay (tPD) | 5.0 ns | — |
| Core Supply Voltage | 1.71 V to 1.89 V (3.3 V with on-chip regulator) | — |
| I/O Supply Voltages | 1.5 V / 1.8 V / 2.5 V / 3.3 V / 5.0 V (MultiVolt) | — |
| Process Technology | 0.18 µm CMOS | 0.18 µm flash-based CMOS |
| 動作温度 | 0 °C to +85 °C (commercial) | — |
| パッケージ | 256-ball MBGA (Micro FBGA), 0.5 mm pitch, 6 × 6 mm | — |
| Configuration Method | On-chip non-volatile (instant-on, ISP via JTAG) | — |
| JTAG Support | IEEE Std 1149.1 boundary-scan + ISP | — |
| Lead-Free / RoHS | Lead-free / RoHS compliant | — |
| Logic Family | CMOS | — |
| Programmable Type | — | In System Programmable |
| Embedded Flash Memory | — | 8 Kbit |
| Pin-to-Pin Logic Delay (tPD) | — | 9 ns |
| Maximum User I/O Pins | — | 160 |
| Supply Voltage - Internal (VCCINT) | — | 1.71 V to 1.89 V |
| I/O Bank Voltages | — | 1.5 V / 1.8 V / 2.5 V / 3.3 V (MultiVolt) |
| Supplier Device Package | — | 256-MBGA (11x11 mm) |
| Package Type Code | — | 256-FBGA / 256-TFBGA |
| Ball Pitch | — | 1.0 mm |
| Programming Interface | — | JTAG (IEEE 1149.1) |
| 動作温度範囲 | — | 0 °C to +85 °C (commercial, suffix 'C') |
| 実装タイプ | — | Surface Mount |
| RoHS ステータス | — | Compliant |
| Lead-Free Status | — | Lead free |