EPM7128SLC84-15 vs EPM7128SLC84-15N 比較
詳細な並列比較: EPM7128SLC84-15 メーカー: Intel および EPM7128SLC84-15N メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
Intel
EPM7128SLC84-15 - 128-Macrocell MAX 7000S CPLD, 84-PLCC | Intel / Altera
EPM7128SLC84-15 ⚠ ラストタイムバイ
仕様比較
| パラメータ | EPM7128SLC84-15 | EPM7128SLC84-15N |
|---|---|---|
| ブランド | Intel | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | ラストバイ | Unknown |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $10.40 | $22.21 |
| Family | MAX 7000S | — |
| Device Type | CPLD - Complex Programmable Logic Device | Complex Programmable Logic Device (CPLD) |
| Macrocells | 128 | — |
| Usable Gates | 2,500 | — |
| User I/Os | 68 (in 84-PLCC) | — |
| パッケージ | 84-Pin PLCC (J-Lead, J84) | 84-pin PLCC |
| Speed Grade | -15 (15 ns pin-to-pin delay) | 15 ns |
| Propagation Delay (tPD) | 15 ns | — |
| Maximum Internal Frequency (fMAX) | 76.9 MHz | — |
| Logic Family / Process | CMOS, 5V, EEPROM | — |
| Supply Voltage (VCCINT) | 5 V | — |
| I/O Standard Support | 5.0 V TTL/CMOS (multi-volt I/O compatible with 3.3V) | — |
| Programming Interface | JTAG (IEEE Std. 1149.1), in-system programmable | — |
| Configuration Memory | Non-volatile EEPROM (instant-on, no boot PROM) | — |
| 動作温度 | 0C to +70C (commercial) | — |
| RoHS ステータス | Non-RoHS (legacy 5V part) | Compliant |
| 実装タイプ | Surface Mount / Socketed (PLCC-84 socket) | Surface Mount |
| Device Family | — | MAX 7000 |
| Logic Gates | — | 2.5K gates |
| Number of Macrocells | — | 128 macrocells |
| Maximum Operating Frequency | — | 76.9 MHz |
| 電源電圧 | — | 5 V |
| Number of I/Os | — | 68 I/Os |
| ピン数 | — | 84 pins |
| Configuration | — | Programmable logic device |
| Manufacturer | — | Altera Corporation |
| Datasheet Page Count | — | 66 pages |
| Datasheet File Size | — | 1 MB |
| Cross-Reference Note | — | EPM7128SLC84-15N is reported as functionally and pin-compatible with earlier EPM7128 variants in the same speed grade and package |