EPM7128SLC84-15 vs EPM7128SLC84-15N 对比
详细并排对比 EPM7128SLC84-15 出自 Intel 和 EPM7128SLC84-15N 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
Intel
EPM7128SLC84-15 - 128-Macrocell MAX 7000S CPLD, 84-PLCC | Intel / Altera
EPM7128SLC84-15 ⚠ 最后一次采购
规格对比
| 参数 | EPM7128SLC84-15 | EPM7128SLC84-15N |
|---|---|---|
| 品牌 | Intel | Altera |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | 最后采购期 | Unknown |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $10.40 | $22.21 |
| Family | MAX 7000S | — |
| Device Type | CPLD - Complex Programmable Logic Device | Complex Programmable Logic Device (CPLD) |
| Macrocells | 128 | — |
| Usable Gates | 2,500 | — |
| User I/Os | 68 (in 84-PLCC) | — |
| 封装 | 84-Pin PLCC (J-Lead, J84) | 84-pin PLCC |
| Speed Grade | -15 (15 ns pin-to-pin delay) | 15 ns |
| Propagation Delay (tPD) | 15 ns | — |
| Maximum Internal Frequency (fMAX) | 76.9 MHz | — |
| Logic Family / Process | CMOS, 5V, EEPROM | — |
| Supply Voltage (VCCINT) | 5 V | — |
| I/O Standard Support | 5.0 V TTL/CMOS (multi-volt I/O compatible with 3.3V) | — |
| Programming Interface | JTAG (IEEE Std. 1149.1), in-system programmable | — |
| Configuration Memory | Non-volatile EEPROM (instant-on, no boot PROM) | — |
| 工作温度 | 0C to +70C (commercial) | — |
| RoHS 状态 | Non-RoHS (legacy 5V part) | Compliant |
| 安装类型 | Surface Mount / Socketed (PLCC-84 socket) | Surface Mount |
| Device Family | — | MAX 7000 |
| Logic Gates | — | 2.5K gates |
| Number of Macrocells | — | 128 macrocells |
| Maximum Operating Frequency | — | 76.9 MHz |
| 电源电压 | — | 5 V |
| Number of I/Os | — | 68 I/Os |
| 引脚数量 | — | 84 pins |
| Configuration | — | Programmable logic device |
| Manufacturer | — | Altera Corporation |
| Datasheet Page Count | — | 66 pages |
| Datasheet File Size | — | 1 MB |
| Cross-Reference Note | — | EPM7128SLC84-15N is reported as functionally and pin-compatible with earlier EPM7128 variants in the same speed grade and package |