EPM7128STC100-6N vs EPM7128SQC100-10N 比較
詳細な並列比較: EPM7128STC100-6N メーカー: Altera および EPM7128SQC100-10N メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
Altera
EPM7128STC100-6N - MAX 7000S 128-Macro-Cell CPLD | Altera | TQFP-100
EPM7128STC100-6N Obsolete
仕様比較
| パラメータ | EPM7128STC100-6N | EPM7128SQC100-10N |
|---|---|---|
| ブランド | Altera | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | 有効 |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $10.50 | $14.95 |
| Family | MAX 7000S | MAX 7000 |
| Usable Gates | 2,500 | 2,500 |
| Macro Cells | 128 | 128 |
| User I/Os | 84 | — |
| Logic Family | CMOS | — |
| ピン数 | 100 | — |
| Package Type | TQFP-100 | — |
| Maximum Internal Frequency | 147.1 MHz | — |
| Internal Counter Frequency | 250 MHz | — |
| Propagation Delay (tPD) | 6 ns | 10 ns |
| Pin-to-Pin Delay | 4.5 ns | — |
| Supply Voltage (VCCIO) | 5 V | — |
| Process Technology | CMOS EEPROM | — |
| Programmability | In-System Programmable (ISP) via JTAG | — |
| JTAG Support | IEEE 1149.1 Boundary Scan | — |
| 動作温度 | 0C to +70C (Commercial) | -40C to +85C (industrial) |
| 実装タイプ | Surface Mount | Surface Mount |
| RoHS ステータス | Non-Compliant (lead-bearing package) | — |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Logic Array Blocks (LABs) | — | 8 (16 macro cells each) |
| User I/O Pins | — | 84 |
| Maximum Frequency | — | 100 MHz |
| Supply Voltage (VCCINT) | — | 5 V (4.75 V to 5.25 V) |
| I/O Voltage Tolerance | — | 3.3 V or 5 V (MultiVolt interface) |
| パッケージ | — | 100-pin PQFP (BQFP) |
| Configuration Memory | — | EEPROM (non-volatile) |
| Programming Interface | — | JTAG (IEEE Std 1149.1), 4-pin |
| Lead-Free / RoHS Status | — | Lead-free (N suffix) |
| Architecture Generation | — | Second-generation MAX |