EPM7160SQC160-6 vs EPM7160SQC160-10N 比較
詳細な並列比較: EPM7160SQC160-6 メーカー: Altera および EPM7160SQC160-10N メーカー: Intel。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
Altera
EPM7160SQC160-6 - 160-Macrocell MAX 7000S CPLD, 6ns, PQFP-160 | Altera
EPM7160SQC160-6 Obsolete仕様比較
| パラメータ | EPM7160SQC160-6 | EPM7160SQC160-10N |
|---|---|---|
| ブランド | Altera | Intel |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | NRND |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $5.45 | $8.10 |
| Series | MAX 7000S | — |
| Product Type | CPLD (Complex Programmable Logic Device) | — |
| Programmable Type | In System Programmable (ISP), EEPROM-based | — |
| Number of Macrocells | 160 | — |
| Number of Logic Elements/Blocks | 10 LABs (Logic Array Blocks) | — |
| Number of Usable Gates | 3,200 | — |
| Number of I/O Pins | 104 | — |
| Propagation Delay (tpd) | 6 ns (max, pin-to-pin) | — |
| Maximum Internal Frequency | 167 MHz | 167 MHz |
| Supply Voltage (VCCINT) | 4.75 V to 5.25 V (nominal 5 V) | 5.0 V |
| Logic Family | CMOS, TTL-compatible I/O | — |
| 動作温度 | 0 C to 70 C (commercial) | 0 C to 70 C (Commercial) |
| Program/Erase Endurance | 100 cycles (EEPROM) | — |
| JTAG / Boundary Scan | IEEE Std 1149.1 compliant | — |
| パッケージ | 160-pin PQFP (Plastic Quad Flat Pack), 28x28 mm body | PQFP-160 (SQC) 31.2 x 31.2 mm |
| 実装タイプ | Surface Mount | Surface Mount |
| Dedicated Input Pins | 4 (GCLK1, GCLRn, OE1, OE2/GCLK2) | — |
| Family | — | MAX 7000S |
| Macro Cells | — | 160 |
| Usable Gates | — | 3,200 |
| Logic Elements / Blocks | — | 10 Logic Array Blocks (LABs) |
| User I/O Pins | — | 104 |
| Pin-to-Pin Delay (tPD) | — | 10 ns |
| Counter Speed (fCNT) | — | 100 MHz |
| In-System Programmability | — | Yes (JTAG IEEE 1149.1) |
| RoHS ステータス | — | Non-Compliant (Pb-bearing PQFP) |
| Memory Technology | — | EEPROM |