EPM7256SQC208-15N vs EPM7256SRC208-10N 比較
詳細な並列比較: EPM7256SQC208-15N メーカー: Altera および EPM7256SRC208-10N メーカー: Intel。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EPM7256SQC208-15N | EPM7256SRC208-10N |
|---|---|---|
| ブランド | Altera | Intel |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $0.00 | $27.20 |
| Series | MAX 7000S | — |
| Macrocells | 256 | 256 |
| User I/O Pins | 164 | 164 |
| Pin-to-Pin Delay | 15 ns (speed grade -15) | — |
| 電源電圧 | 5 V | 5.0 V |
| パッケージ | 208-pin PQFP | 208-pin RQFP (PowerQuad Flat Pack) |
| 実装タイプ | Surface Mount | Surface Mount |
| Configuration Memory | EEPROM (non-volatile) | EEPROM (non-volatile) |
| JTAG Interface | IEEE 1149.1 boundary-scan | — |
| In-System Programmability | Yes (ISP) | Yes (IEEE 1149.1 JTAG) |
| 動作温度 | [DATA_NEEDED: operating temperature range] | 0C to +70C (commercial) |
| RoHS ステータス | Lead free / RoHS Compliant | Compliant (N suffix = lead-free) |
| Logic Array Blocks | 16 macrocells per LAB | — |
| Interconnect | Programmable Interconnect Array (PIA) | — |
| Speed Grade | -15 | — |
| Product Category | CPLD - Complex Programmable Logic Devices | — |
| Manufacturer | Altera (Intel Programmable Solutions Group) | — |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Family | — | MAX 7000S |
| Usable Gates | — | 5,000 |
| Pin-to-Pin Delay (tPD) | — | 10 ns |
| Maximum Counter Frequency | — | 100 MHz |
| Logic Levels | — | 5.0 V TTL/CMOS compatible |
| Number of Logic Array Blocks | — | [DATA_NEEDED: number of LABs] |
| Maximum User Flash Memory | — | [DATA_NEEDED: user flash memory] |