EPM7256SQI208-10 vs EPM7256SQC208-15 比較
詳細な並列比較: EPM7256SQI208-10 メーカー: Altera および EPM7256SQC208-15 メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EPM7256SQI208-10 | EPM7256SQC208-15 |
|---|---|---|
| ブランド | Altera | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | NRND | NRND |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $0.40 | $3.65 |
| Device Family | MAX 7000 (EPM7256) | — |
| Macrocells | 256 | 256 |
| Usable Gates | 5000 | 5000 |
| Logic Array Blocks | 16 | — |
| Maximum User I/O Pins | 164 | — |
| Propagation Delay (tPD) | 10 ns | — |
| Supply Voltage Range | 4.5 V to 5.5 V | — |
| Technology | CMOS EEPROM | — |
| Configuration Memory | EEPROM (non-volatile) | EEPROM (non-volatile) |
| In-System Programmable | Yes (IEEE 1149.1 JTAG) | — |
| パッケージ | 208-pin PQFP (QFP208) | 208-pin PQFP (28x28 mm) |
| Package Body Material | Plastic/Epoxy | — |
| Terminal Form | Gull Wing | — |
| 動作温度範囲 | -40 C to +85 C (Industrial) | 0 C to +70 C (Commercial) |
| 実装タイプ | Surface Mount | Surface Mount |
| RoHS ステータス | [DATA_NEEDED: RoHS status] | Contains lead / RoHS non-compliant (per third-party listing) |
| JESD-30 Package Code | S-PQFP-G208 | — |
| JESD-609 Terminal Finish Code | E3 | — |
| Family | — | MAX 7000S |
| Series | — | EPM7256 |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Logic Array Blocks (LABs) | — | 16 |
| User I/O Pins | — | 164 |
| Pin-to-Pin Delay (tPD) | — | 15 ns |
| Supply Voltage (VCCINT) | — | 4.75 V to 5.25 V |
| Programmable Power Mode | — | Yes (per-macrocell turbo-bit) |
| JTAG (IEEE 1149.1) Boundary-Scan | — | Yes |
| In-System Programmability (ISP) | — | Yes |
| Lead-Free Status | — | Contains lead |