EPM7512BQC208-5 vs EPM7512BQC208-10 比較
詳細な並列比較: EPM7512BQC208-5 メーカー: Altera および EPM7512BQC208-10 メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
Altera
EPM7512BQC208-10 - 512-Macrocell MAX 7000B CPLD, 10ns, PQFP-208 | Altera (Intel)
EPM7512BQC208-10 Nrnd仕様比較
| パラメータ | EPM7512BQC208-5 | EPM7512BQC208-10 |
|---|---|---|
| ブランド | Altera | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | NRND |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $38.66 | $19.40 |
| Family | MAX 7000B | MAX 7000B |
| Device Type | EEPROM-based Complex Programmable Logic Device (CPLD) | — |
| Macrocells | 512 | 512 |
| Usable Gates | 10,000 | 10,000 |
| User I/O Pins | 176 | — |
| Logic Array Blocks | 16 | — |
| Propagation Delay (tPD) | 5 ns | — |
| Internal Frequency | 163.9 MHz | — |
| Supply Voltage (VCCINT) | 2.375 V to 2.625 V (2.5 V nominal) | — |
| Programmable Type | In System Programmable (ISP) | In-System Programmable (EEPROM) |
| Configuration Memory | EEPROM (non-volatile) | — |
| パッケージ | 208-pin PQFP (28x28 mm) | — |
| Package Code | FQFP / S-PQFP-G208 | — |
| Terminal Pitch | 0.5 mm | — |
| 実装タイプ | Surface Mount | Surface Mount |
| 動作温度 | 0C to 70C (commercial) | 0 C to +70 C (commercial) |
| JTAG Support | IEEE 1149.1 boundary-scan | — |
| Speed Grade | -5 (fastest MAX 7000B grade) | — |
| RoHS ステータス | [DATA_NEEDED: RoHS status] | unknown |
| Series | — | MAX 7000B |
| Logic Elements / Blocks | — | 32 LABs (16 macrocells per LAB) |
| User I/Os | — | 176 |
| Propagation Delay (tpd) | — | 10 ns (max, pin-to-pin) |
| Internal Supply Voltage | — | 2.375 V to 2.625 V (nominal 2.5 V) |
| パッケージ / ケース | — | 208-pin PQFP (28x28 mm), S-PQFP-G208 |
| Architecture | — | CMOS, Multiple Array Matrix (MAX) second-generation |
| JTAG / Boundary Scan | — | IEEE Std 1149.1 compliant |
| MSLレベル | — | [DATA_NEEDED: MSL Level] |