EPM9320LC84-20N vs EPM9320LC84-10 比較
詳細な並列比較: EPM9320LC84-20N メーカー: Intel および EPM9320LC84-10 メーカー: Intel。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EPM9320LC84-20N | EPM9320LC84-10 |
|---|---|---|
| ブランド | Intel | Intel |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | 有効 | NRND |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $10.25 | $84.96 |
| Series | MAX 9000 | — |
| Logic Family | CMOS (EEPROM-based) | — |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Usable Gates | 6,000 | 6000 (typical) |
| Macrocells | 320 | 320 |
| User I/Os | 60 | — |
| ピン数 | 84 | — |
| Package Type | Plastic Leaded Chip Carrier (PLCC-84, J-bend) | — |
| Package Code | QCCJ | — |
| Propagation Delay (tPD) | 16 ns | — |
| Internal Frequency | 118 MHz | — |
| Supply Voltage (VCC) | 5 V | 5.0 V (typical, see datasheet) |
| 動作温度 | 0 C to +70 C (Commercial) | 0C to +70C (commercial) [DATA_NEEDED: exact grade suffix] |
| Programming | 5.0-V In-System Programmable via JTAG (IEEE 1149.1) | — |
| 実装タイプ | Surface Mount (J-bend) | Surface Mount (PLCC socket also common) |
| Terminal Form | J BEND | — |
| MSLレベル | [DATA_NEEDED: MSL moisture sensitivity level] | — |
| RoHS ステータス | [DATA_NEEDED: RoHS compliance status] | ROHS3 Compliant (per fpgalink listing) |
| Family | — | MAX 9000 EPLD |
| Device | — | EPM9320 |
| Logic Array Blocks (LABs) | — | 16 |
| Maximum User I/O Pins | — | 168 (varies by package) |
| Pin-to-Pin Logic Delay (tPD) | — | 10 ns |
| Maximum Frequency (fCNT) | — | [DATA_NEEDED: fCNT in MHz] |
| Process Technology | — | 0.7 µm CMOS EEPROM/UV-EPROM |
| パッケージ | — | 84-pin PLCC (JEDEC MO-047) |
| Programming Interface | — | JTAG (IEEE 1149.1) boundary-scan, Altera ByteBlaster compatible |
| Configuration | — | Non-volatile EEPROM (instant-on, no boot PROM) |
| 湿気感度レベル（MSL） | — | MSL-3, 168 hours (per fpgalink listing) |
| Manufacturer Lead Time | — | 1-7 days (per fpgalink listing) |