EPM9320RI208-20 vs EPM9320RC208-20 比較
詳細な並列比較: EPM9320RI208-20 メーカー: Intel および EPM9320RC208-20 メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EPM9320RI208-20 | EPM9320RC208-20 |
|---|---|---|
| ブランド | Intel | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $18.95 | $21.90 |
| Family | MAX 9000 | MAX 9000 |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD (Complex Programmable Logic Device) |
| Macrocells | 320 | 320 |
| Usable Gates | 6,000 | 6,000 |
| Propagation Delay (tPD) | 20 ns | — |
| Maximum Operating Frequency | 100 MHz | — |
| Supply Voltage (VCC) | 5.0 V | — |
| Logic Elements / LABs | 20 Logic Array Blocks (16 macro cells each) | — |
| Programmable Interconnect | Programmable Interconnect Array (PIA) | — |
| In-System Programmability | Yes - IEEE 1149.1 JTAG, 5.0-V ISP | — |
| Dedicated Input Pins | 4 (low-skew global) | — |
| User I/O Pins | [DATA_NEEDED: I/O pin count for 208-pin RQFP] | — |
| パッケージ | 208-pin RQFP (Power Quad Flat Pack) | 208-RQFP, exposed pad (208-BFQFP) |
| Operating Temperature Grade | Industrial | — |
| Technology | CMOS EEPROM | — |
| 実装タイプ | Surface Mount | Surface Mount |
| MSLレベル | [DATA_NEEDED: MSL rating] | — |
| RoHS ステータス | [DATA_NEEDED: RoHS compliance] | — |
| Logic Array Blocks (LABs) | — | 20 |
| Maximum I/O Pins | — | 132 |
| Propagation Delay (tPD max) | — | 20 ns |
| Supply Voltage (VCCINT) | — | 4.75 V to 5.25 V |
| Programming Technology | — | EEPROM, in-system programmable (ISP) |
| Boundary-Scan Interface | — | IEEE Std. 1149.1 (JTAG) |
| 動作温度 | — | 0 °C to 70 °C (commercial) |
| Architecture | — | Multiple Array Matrix (MAX), 3rd generation |
| Process Technology | — | CMOS, 5.0 V EEPROM |
| Reprogrammability | — | Yes, unlimited ISP cycles |