EPM9560RC208-5 vs EPM9560RC208-10 比較
詳細な並列比較: EPM9560RC208-5 メーカー: Altera および EPM9560RC208-10 メーカー: Intel。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EPM9560RC208-5 | EPM9560RC208-10 |
|---|---|---|
| ブランド | Altera | Intel |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $62.00 | $15.40 |
| Family | MAX 9000 | MAX 9000 |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD (Complex Programmable Logic Device) |
| Macro Cells | 560 | — |
| Usable Gates | 12,000 | 12,000 |
| Logic Array Blocks (LABs) | 16 | 16 |
| Maximum User I/O | 149 | — |
| Dedicated Inputs | 16 | — |
| Flip-Flops | 772 | — |
| Propagation Delay (tPD) | 5 ns | — |
| Internal Counter Frequency (fCNT) | 117.6 MHz | — |
| Supply Voltage (VCC) | 5.0 V | — |
| パッケージ | 208-pin RQFP (Plastic Quad Flat Pack) | 208-pin RQFP (Plastic Quad Flat Pack) |
| Process Technology | CMOS EEPROM | 0.30 µm CMOS EEPROM |
| Programming Interface | JTAG (IEEE Std 1149.1) + 5V ISP | — |
| 動作温度 | 0C to +70C (commercial) | 0C to +70C (commercial) |
| RoHS ステータス | Non-compliant (5V process, legacy RQFP) | [DATA_NEEDED: not stated in retrieved distributor listings] |
| Macrocells | — | 560 |
| Maximum User I/O Pins | — | 212 (208-pin package variant) |
| Pin-to-Pin Delay (tPD) | — | 10 ns |
| Maximum Frequency (fMAX) | — | [DATA_NEEDED: internal toggle frequency in MHz] |
| Supply Voltage (VCCINT) | — | 5.0 V |
| I/O Standards Supported | — | 5.0 V TTL, 3.3 V LVTTL, 2.5 V (multiVolt I/O) |
| Configuration Memory | — | EEPROM (in-system programmable via JTAG) |
| 実装タイプ | — | Surface Mount |
| Lead-Free | — | [DATA_NEEDED: confirm lead-free status -10 suffix is conventional Pb-containing] |
| Programmability | — | JTAG (IEEE 1149.1) in-system programming |