EPM9560RC208-5 vs EPM9560RC208-10 对比

详细并排对比 EPM9560RC208-5 出自 Altera 和 EPM9560RC208-10 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPM9560RC208-5 EPM9560RC208-10
品牌 Altera Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $62.00 $15.40
Family MAX 9000 MAX 9000
Device Type CPLD (Complex Programmable Logic Device) CPLD (Complex Programmable Logic Device)
Macro Cells 560 —
Usable Gates 12,000 12,000
Logic Array Blocks (LABs) 16 16
Maximum User I/O 149 —
Dedicated Inputs 16 —
Flip-Flops 772 —
Propagation Delay (tPD) 5 ns —
Internal Counter Frequency (fCNT) 117.6 MHz —
Supply Voltage (VCC) 5.0 V —
封装 208-pin RQFP (Plastic Quad Flat Pack) 208-pin RQFP (Plastic Quad Flat Pack)
Process Technology CMOS EEPROM 0.30 µm CMOS EEPROM
Programming Interface JTAG (IEEE Std 1149.1) + 5V ISP —
工作温度 0C to +70C (commercial) 0C to +70C (commercial)
RoHS 状态 Non-compliant (5V process, legacy RQFP) [DATA_NEEDED: not stated in retrieved distributor listings]
Macrocells — 560
Maximum User I/O Pins — 212 (208-pin package variant)
Pin-to-Pin Delay (tPD) — 10 ns
Maximum Frequency (fMAX) — [DATA_NEEDED: internal toggle frequency in MHz]
Supply Voltage (VCCINT) — 5.0 V
I/O Standards Supported — 5.0 V TTL, 3.3 V LVTTL, 2.5 V (multiVolt I/O)
Configuration Memory — EEPROM (in-system programmable via JTAG)
安装类型 — Surface Mount
Lead-Free — [DATA_NEEDED: confirm lead-free status -10 suffix is conventional Pb-containing]
Programmability — JTAG (IEEE 1149.1) in-system programming

数据手册与资源

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