EPM9560RC240-15C vs EPM9560RC240-12 比較
詳細な並列比較: EPM9560RC240-15C メーカー: Intel および EPM9560RC240-12 メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EPM9560RC240-15C | EPM9560RC240-12 |
|---|---|---|
| ブランド | Intel | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $0.00 | $9.95 |
| Family | MAX 9000 | MAX 9000 (EPM9560) |
| Device Type | EEPROM-based CPLD | EE PLD / CPLD |
| Usable Gates | 12,000 | — |
| Macrocells | 560 | 560 |
| Logic Array Blocks | 20 | — |
| User I/O Pins | 187 | 191 |
| Maximum Internal Frequency | 117.6 MHz | — |
| Propagation Delay (tPD) | 15 ns | — |
| 電源電圧 | 5.0 V | — |
| Operating Voltage Range | 3.3 V or 5 V | — |
| パッケージ | 240-pin RQFP (PowerQuad II) | PQFP-240 (RC240) 0.500 mm pitch, gull-wing |
| Terminal Pitch | 0.5 mm | — |
| 実装タイプ | Surface Mount | Surface Mount |
| 動作温度 | 0C to +70C (Commercial) | [DATA_NEEDED: operating temperature grade] |
| Configuration Technology | EEPROM (non-volatile) | — |
| In-System Programmability | Yes (ISP via JTAG) | — |
| JTAG Interface | IEEE 1149.1 boundary-scan | — |
| Process Technology | CMOS | CMOS |
| RoHS ステータス | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS compliance] |
| MSLレベル | [DATA_NEEDED: MSL level] | — |
| Flip-Flops | — | 772 |
| Logic Array Blocks (LABs) | — | 20 |
| Maximum Propagation Delay (tPD) | — | 13.4 ns |
| Speed Grade | — | -12 (13.4 ns tPD) |
| Maximum Operating Frequency (estimated) | — | ~76 MHz registered |
| Core Supply Voltage (VCCINT) | — | 5 V |
| I/O Logic Levels | — | 3.3 V or 5 V (configurable) |
| Configuration Memory | — | EEPROM (non-volatile) |
| Programming Interface | — | IEEE 1149.1 JTAG |