EPM9560RC240-15N vs EPM9560RC240-2 比較
詳細な並列比較: EPM9560RC240-15N メーカー: Altera および EPM9560RC240-2 メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EPM9560RC240-15N | EPM9560RC240-2 |
|---|---|---|
| ブランド | Altera | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | NRND | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $27.85 | $180.00 |
| Series | MAX 9000 | — |
| Family | MAX 9000 (third-generation Multiple Array MatriX) | MAX 9000 |
| Usable Gates | 12,000 | 12,000 |
| Macrocells | 560 | — |
| Logic Array Blocks (LABs) | 35 | — |
| Maximum User I/O Pins | 216 | — |
| Pin-to-Pin Propagation Delay (tPD) | 15 ns | — |
| Internal Counter Frequency (fCNT) | 145 MHz | — |
| Global Setup Time (tFSU) | [DATA_NEEDED: tFSU for -15 grade] | — |
| Clock-to-Output Time (tFCO) | [DATA_NEEDED: tFCO for -15 grade] | — |
| 電源電圧 | 5.0 V | 5 V |
| Logic Family | CMOS (EEPROM-based) | — |
| Programmability | In-system programmable (IEEE 1532/JTAG) | — |
| Boundary-Scan Test | JTAG (IEEE 1149.1) | — |
| 動作温度 | 0C to +70C (Commercial) | [DATA_NEEDED: commercial/industrial grade] |
| パッケージ | RQFP-240 (240-pin Plastic Quad Flat Pack) | 240-pin RQFP (Metric QFP) |
| 実装タイプ | Surface Mount | Surface Mount |
| RoHS ステータス | [DATA_NEEDED: RoHS compliance - older Altera RQFP part] | Non-compliant (5V RQFP, pre-RoHS era) |
| Logic Elements | — | 560 macrocells |
| Pin-to-Pin Delay | — | 2 ns (speed grade -2) |
| Maximum Frequency | — | 100 MHz |
| User I/O Count | — | 212 |
| Programming Interface | — | JTAG (IEEE 1149.1), in-system programmable |
| Non-Volatile Configuration | — | Yes (EEPROM-based) |
| Lead-Free | — | No (legacy Sn/Pb process) |
| Logic Block Count | — | [DATA_NEEDED: LAB count] |