EPM9560RC240-1O vs EPM9560RC240-15 比較
詳細な並列比較: EPM9560RC240-1O メーカー: Intel および EPM9560RC240-15 メーカー: Intel。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
Intel
EPM9560RC240-1O - MAX 9000 CPLD, 560 Macrocells, 216 I/O, RQFP-240 | Altera
EPM9560RC240-1O ⚠ ラストタイムバイ仕様比較
| パラメータ | EPM9560RC240-1O | EPM9560RC240-15 |
|---|---|---|
| ブランド | Intel | Intel |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | ラストバイ | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $51.07 | $174.72 |
| Family | MAX 9000 | — |
| Usable Gates | 12,000 | 12,000 |
| Macrocells | 560 | 560 |
| Logic Array Blocks (LABs) | 35 | — |
| Maximum User I/O Pins | 216 | — |
| Propagation Delay (tPD) | 12 ns (typ, -1 speed grade) | — |
| Global Setup Time (tFSU) | 3.0 ns | — |
| Clock-to-Output (tFCO) | 4.8 ns | — |
| Maximum Internal Frequency (fCNT) | 145 MHz | — |
| Supply Voltage (VCC) | 5.0 V | — |
| Operating Temperature (Grade) | -40C to +85C (industrial, "-1O" suffix) | — |
| Process Technology | CMOS EEPROM, 0.65 um | — |
| Programming | In-system programmable via IEEE 1149.1 JTAG | — |
| Architecture | Multiple Array MatriX (MAX), third generation | — |
| パッケージ | RQFP-240 (240-pin Reduced-height QFP) | 240-pin RQFP (32x32 mm) with exposed pad |
| 実装タイプ | Surface Mount | Surface Mount |
| RoHS ステータス | Compliant (per Altera/Intel product page) | [DATA_NEEDED: RoHS status] |
| Lead-Free | Yes | — |
| Logic Family | — | MAX 9000 (CMOS EEPROM-based) |
| User I/O Pins | — | 191 |
| Pin-to-Pin Propagation Delay | — | 15 ns |
| Maximum Internal Frequency | — | 145 MHz |
| 電源電圧 | — | 5.0 V |
| 動作温度 | — | 0 C to 70 C (commercial) |
| Configuration Technology | — | EEPROM (non-volatile) |
| In-System Programmability | — | Yes (JTAG ISP) |
| Number of Terminals | — | 240 |
| Package Code | — | FQFP / RQFP |
| Terminal Form | — | Gull Wing |
| Package Shape | — | Square |
| MSLレベル | — | [DATA_NEEDED: MSL level] |