EPM9560RC304C-3 vs EPM9560RC304-15 比較
詳細な並列比較: EPM9560RC304C-3 メーカー: Altera および EPM9560RC304-15 メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
Altera
EPM9560RC304C-3 - MAX 9000 CPLD, 560 Macrocells, 304-Pin RBGGA | Altera
EPM9560RC304C-3 Obsolete仕様比較
| パラメータ | EPM9560RC304C-3 | EPM9560RC304-15 |
|---|---|---|
| ブランド | Altera | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $95.00 | $9.40 |
| Family | MAX 9000 | — |
| Device Type | CPLD (EPLD) | — |
| Macrocells (Logic Elements) | 560 | — |
| Usable Gates | 12,000 | — |
| パッケージ | RBGGA-304 (Ceramic Ball Grid Array) | 304-pin RQFP (Plastic Quad Flat Pack) |
| ピン数 | 304 | 304 |
| User I/O Pins | 212 | 212 (maximum) |
| Speed Grade | -3 (3 ns pin-to-pin, commercial) | — |
| 動作温度 | 0 C to +70 C (Commercial) | [DATA_NEEDED: industrial/commercial temperature grade] |
| 電源電圧 | 5 V | — |
| Programmability | In-system, non-volatile EEPROM | — |
| JTAG Support | IEEE 1149.1 boundary-scan | — |
| Logic Blocks | Logic Array Blocks (LABs) with PIA interconnect | — |
| RoHS ステータス | unknown (legacy part, pre-RoHS era) | [DATA_NEEDED: lead-free / RoHS compliance status] |
| 実装タイプ | Surface Mount (BGA) | Surface Mount |
| Device Family | — | MAX 9000 |
| Architecture | — | Multiple Array MatriX (MAX), EEPROM-based |
| Macrocells | — | 560 |
| Logic Array Blocks (LABs) | — | 16 |
| Propagation Delay (tPD) | — | 15 ns (combinatorial, pin-to-pin) |
| Supply Voltage (VCCINT) | — | 5.0 V |
| I/O Standard | — | 5.0 V TTL / PCI-compliant |
| In-System Programmability | — | Yes, via IEEE Std. 1149.1 JTAG |
| Configuration Memory | — | On-chip EEPROM (non-volatile) |
| Technology Node | — | High-performance CMOS, EEPROM process |