EPM9560RCRC304-15 vs EPM9560RC304-20 比較
詳細な並列比較: EPM9560RCRC304-15 メーカー: Altera および EPM9560RC304-20 メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EPM9560RCRC304-15 | EPM9560RC304-20 |
|---|---|---|
| ブランド | Altera | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $0.00 | $0.00 |
| Device Family | MAX 9000 (EPM9560) | MAX 9000 (EPM9560) |
| Logic Type | EEPROM-based Complex Programmable Logic Device (CPLD) | — |
| Macro Cells | 560 | — |
| Usable Gates | 12,000 | 12,000 |
| Pin-to-Pin Propagation Delay (tPD) | 15 ns | — |
| Maximum Frequency | 117.6 MHz | — |
| 電源電圧 | 5.0 V | — |
| Configuration Memory | EEPROM (non-volatile, in-system programmable) | — |
| In-System Programmability (ISP) | Yes, via IEEE Std. 1149.1 JTAG | — |
| JTAG Interface | IEEE Std. 1149.1 (built-in) | IEEE Std. 1149.1 (built-in) |
| パッケージ | 304-pin RQFP (PowerQuad Flat Pack) | 304-pin RQFP |
| 実装タイプ | Surface Mount | Surface Mount |
| 動作温度範囲 | [DATA_NEEDED: operating temperature range] | — |
| Number of User I/O Pins | [DATA_NEEDED: user I/O pin count] | — |
| Architecture | Third-generation Multiple Array MatriX (MAX) | — |
| Logic Array Blocks (LABs) | [DATA_NEEDED: LAB count] | 20 |
| RoHS ステータス | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| Lead Finish | [DATA_NEEDED: lead finish] | — |
| Macrocells | — | 560 |
| User I/O Lines | — | 212 |
| Propagation Delay (tPD) | — | 20 ns |
| Maximum Operating Frequency | — | 100 MHz |
| Core Supply Voltage | — | 5.0 V |
| I/O Voltage | — | 3.3 V or 5 V (configurable) |
| Configuration Technology | — | EEPROM (in-system programmable) |
| 動作温度 | — | [DATA_NEEDED: operating temperature range] |
| Speed Grade | — | -20 |
| MSLレベル | — | [DATA_NEEDED: MSL level] |