EPM9560RI208-10N vs EPM9560RI208-20W 比較
詳細な並列比較: EPM9560RI208-10N メーカー: Altera および EPM9560RI208-20W メーカー: Intel。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EPM9560RI208-10N | EPM9560RI208-20W |
|---|---|---|
| ブランド | Altera | Intel |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | NRND |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $61.75 | $48.75 |
| Family | MAX 9000 | MAX 9000 |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD (Complex Programmable Logic Device) |
| Architecture | CMOS EEPROM-based Multiple Array MatriX (MAX) | Third-generation Multiple Array MatriX (MAX) |
| Usable Gates | 12,000 | 12,000 |
| Macro Cells | 560 | — |
| Register Bits | 12,160 | — |
| User I/Os | 212 | — |
| Pin-to-Pin Delay | 10 ns (speed grade -10) | — |
| Maximum Frequency | 100 MHz to 125 MHz | — |
| 電源電圧 | 5 V | 5.0 V |
| パッケージ | 208-pin RQFP (PQFP) | 208-pin RQFP (Power Quad Flat Pack) |
| 動作温度 | -40C to +85C (Industrial grade, "RI" suffix) | -40C to +85C (Industrial) |
| Programming Method | In-system via IEEE 1149.1 (JTAG) | — |
| MSLレベル | 3 (168 Hours) | — |
| RoHS ステータス | ROHS3 Compliant (per fpgalink) | — |
| Configuration Memory | On-chip EEPROM (non-volatile) | — |
| Macrocells | — | 560 |
| Logic Array Blocks (LABs) | — | 16 LABs of 40 macrocells each |
| User I/O Pins | — | 212 |
| Pin-to-Pin Delay (tPD) | — | 20 ns |
| Counter Frequency (fCNT) | — | 100 MHz |
| Speed Grade | — | -20 |
| In-System Programmability | — | Yes (IEEE 1149.1 JTAG) |
| Programming Technology | — | CMOS EEPROM |