EPM9560WC208-20 vs EPM9560RC208-20C 比較
詳細な並列比較: EPM9560WC208-20 メーカー: Altera および EPM9560RC208-20C メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
Altera
EPM9560WC208-20 - 560-Macrocell CPLD, 23.6ns, PQFP-208 | Intel/Altera
EPM9560WC208-20 Obsolete
仕様比較
| パラメータ | EPM9560WC208-20 | EPM9560RC208-20C |
|---|---|---|
| ブランド | Altera | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $25.80 | $0.00 |
| Family | MAX 9000 | MAX 9000 |
| Device Type | CPLD (EPLD) | EEPROM-based CPLD (EE PLD) |
| Macrocells | 560 | 560 |
| Logic Array Blocks (LABs) | 35 | — |
| User I/O Pins | 149 | — |
| Maximum Propagation Delay (tPD) | 23.6 ns | — |
| パッケージ | PQFP-208 (RQFP/WQFP) | 208-pin RQFP (Power Quad Flat Pack) |
| Process Technology | CMOS, EEPROM-based | — |
| Supply Voltage (VCCINT) | 5 V (typical, see datasheet) | — |
| I/O Voltage (VCCIO) | 3.3 V or 5 V (multi-voltage I/O) | — |
| In-System Programmability | Yes, JTAG BST (IEEE 1149.1) | Yes, via IEEE Std. 1149.1 JTAG |
| Pin/Package Suffix | W = power PQFP; -20 = 23.6 ns speed grade | — |
| 動作温度 | Commercial (0C to +70C) [DATA_NEEDED: exact temp grade] | — |
| 実装タイプ | Surface Mount | Surface Mount |
| RoHS ステータス | Non-compliant (legacy PQFP) [DATA_NEEDED: confirm from official doc] | [DATA_NEEDED: RoHS status] |
| Lead-Free | [DATA_NEEDED] | — |
| ハロゲンフリー | [DATA_NEEDED] | — |
| MSLレベル | [DATA_NEEDED] | — |
| Usable Gates | — | 12,000 |
| Flip-Flops | — | 772 |
| Configurable I/O Lines | — | 149 |
| Propagation Delay (tPD) | — | 20 ns (speed grade -20) |
| Maximum Frequency | — | 100 MHz |
| 電源電圧 | — | 5.0 V |
| I/O Voltage Support | — | 3.3 V or 5 V |
| Configuration Memory | — | EEPROM (non-volatile) |
| JESD-30 Package Code | — | S-PQFP-G208 |
| Terminal Form | — | Gull Wing |
| Operating Temperature Grade | — | Commercial (0C to +70C) |
| Technology | — | CMOS |